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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Ddavinci_emac.txt7 - compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or
8 "ti,dm816-emac"
9 - reg: Offset and length of the register set for the device
10 - ti,davinci-ctrl-reg-offset: offset to control register
11 - ti,davinci-ctrl-mod-reg-offset: offset to control module register
12 - ti,davinci-ctrl-ram-offset: offset to control module ram
13 - ti,davinci-ctrl-ram-size: size of control module ram
14 - interrupts: interrupt mapping for the davinci emac interrupts sources:
21 - phy-handle: See ethernet.txt file in the same directory.
23 - ti,davinci-rmii-en: 1 byte, 1 means use RMII
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - i
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H A Dti,phy-usb3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,phy-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PIPE3 PHY Module
10 - Roger Quadros <rogerq@ti.com>
13 The TI PIPE3 PHY is a high-speed SerDes (Serializer/Deserializer)
17 high-speed serial interfaces.
21 pattern: "^(pcie-phy|usb3-phy|phy)@[0-9a-f]+$"
25 - ti,omap-usb3
[all …]
H A Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
19 - ti,dra7x-usb2-phy2
[all …]
H A Dphy-lantiq-rcu-usb2.txt4 This binding describes the USB PHY hardware provided by the RCU module on the
9 -------------------------------------------------------------------------------
11 - compatible : Should be one of
12 "lantiq,ase-usb2-phy"
13 "lantiq,danube-usb2-phy"
14 "lantiq,xrx100-usb2-phy"
15 "lantiq,xrx200-usb2-phy"
16 "lantiq,xrx300-usb2-phy"
17 - reg : Defines the following sets of registers in the parent
19 - Offset of the USB PHY configuration register
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/freebsd/contrib/wpa/src/nan/
H A Dnan_util.c2 * Wi-Fi Aware - NAN module utils
24 dl_list_del(&entry->list); in nan_attrs_clear_list()
31 * nan_attrs_clear - Free data from NAN parsing
32 * @nan: NAN module context from nan_init()
37 nan_attrs_clear_list(nan, &attrs->serv_desc_ext); in nan_attrs_clear()
38 nan_attrs_clear_list(nan, &attrs->avail); in nan_attrs_clear()
39 nan_attrs_clear_list(nan, &attrs->ndc); in nan_attrs_clear()
40 nan_attrs_clear_list(nan, &attrs->ulw); in nan_attrs_clear()
41 nan_attrs_clear_list(nan, &attrs->dev_capa); in nan_attrs_clear()
42 nan_attrs_clear_list(nan, &attrs->element_container); in nan_attrs_clear()
[all …]
H A Dnan.c2 * Wi-Fi Aware - NAN module
39 if (!cfg->start || !cfg->stop) in nan_init()
46 if (cfg->pairing_cfg.pairing_verification && in nan_init()
47 nan_nira_get_tag_nonce(cfg, nan->nira_nonce, nan->nira_tag) < 0) { in nan_init()
53 nan->cfg = os_memdup(cfg, sizeof(*cfg)); in nan_init()
54 if (!nan->cfg) { in nan_init()
60 nan->initiator_pmksa = pasn_initiator_pmksa_cache_init(); in nan_init()
61 nan->responder_pmksa = pasn_responder_pmksa_cache_init(); in nan_init()
62 if (!nan->initiator_pmksa || !nan->responder_pmksa) { in nan_init()
70 dl_list_init(&nan->peer_list); in nan_init()
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dti,vip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2025 Texas Instruments Incorporated - http://www.ti.com/
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
13 description: |-
16 connect parallel image-sensor as well as BT.656/1120 capable encoder
26 - ti,dra7-vip
33 - description: IRQ index 0 is used for Slice0 interrupts
34 - description: IRQ index 1 is used for Slice1 interrupts
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dti,omap4-musb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,omap4-musb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@ti.com>
14 Handles SoC-specific integration including PHY interface bridging(ULPI/
16 external), VBUS/session control via control module mailbox, and
23 - ti,omap3-musb
24 - ti,omap4-musb
33 interrupt-names:
[all …]
H A Domap-usb.txt4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
5 - ti,hwmods : must be "usb_otg_hs"
6 - multipoint : Should be "1" indicating the musb controller supports
7 multipoint. This is a MUSB configuration-specific setting.
8 - num-eps : Specifies the number of endpoints. This is also a
9 MUSB configuration-specific setting. Should be set to "16"
10 - ram-bits : Specifies the ram address size. Should be set to "12"
11 - interface-type : This is a board specific setting to describe the type of
14 - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
16 - power : Should be "50". This signifies the controller can supply up to
[all …]
H A Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
8 at least a control module node, USB node and a PHY node. The second USB
11 Reset module
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
15 Module" block. A second offset and length for the USB wake up control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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H A Dam3517.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 /delete-node/ &aes1_target;
12 /delete-node/ &aes2_target;
24 operating-points-v2 = <&cpu0_opp_table>;
26 clock-latency = <300000>; /* From legacy driver */
30 cpu0_opp_table: opp-table {
31 compatible = "operating-points-v2-ti-cpu";
38 opp-50-300000000 {
40 opp-hz = /bits/ 64 <300000000>;
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/freebsd/sys/dev/acpi_support/
H A Dacpi_system76.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <sys/module.h>
193 val = (i - 1) * 16; in backlight_to_devstate()
208 return (&sc->kbb); in acpi_system76_ctrl_map()
210 return (&sc->kbc); in acpi_system76_ctrl_map()
212 return (&sc->bctl); in acpi_system76_ctrl_map()
214 return (&sc->bcth); in acpi_system76_ctrl_map()
216 device_printf(sc->dev, "Driver received unknown method\n"); in acpi_system76_ctrl_map()
224 struct acpi_ctrl *ctrl; in acpi_system76_update() local
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/frequency/
H A Dadi,admfm2000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kim Seer Paller <kimseer.paller@analog.com>
14 Dual microwave down converter module with input RF and LO frequency ranges
22 - adi,admfm2000
24 '#address-cells':
27 '#size-cells':
31 "^channel@[0-1]$":
44 adi,mixer-mode:
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/freebsd/contrib/wpa/src/fst/
H A Dfst_internal.h2 * FST module - auxiliary definitions
34 struct fst_ctrl ctrl; member
45 if (__fst_ctrl_h->ctrl.clb) \
46 __fst_ctrl_h->ctrl.clb(__VA_ARGS__);\
H A Dfst.c2 * FST module implementation
52 if (os_strcmp(cfg->group_id, fst_group_get_id(g)) == 0) { in fst_attach()
59 group = fst_group_create(cfg->group_id); in fst_attach()
62 cfg->group_id); in fst_attach()
84 cfg->group_id, cfg->priority, cfg->llt); in fst_attach()
134 struct fst_ctrl_handle * fst_global_add_ctrl(const struct fst_ctrl *ctrl) in fst_global_add_ctrl() argument
138 if (!ctrl) in fst_global_add_ctrl()
145 if (ctrl->init && ctrl->init()) { in fst_global_add_ctrl()
150 h->ctrl = *ctrl; in fst_global_add_ctrl()
151 dl_list_add_tail(&fst_global_ctrls_list, &h->global_ctrls_lentry); in fst_global_add_ctrl()
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/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dti,j721e-system-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 This represents the Control Module registers (CTRL_MMR0) on the SoC.
14 represent as any specific type of device. The typical use-case is
15 for some other node's driver, or platform-specific code, to acquire
22 - Kishon Vijay Abraham I <kishon@kernel.org>
23 - Roger Quadros <rogerq@kernel.org>
[all …]
/freebsd/usr.sbin/wpa/wpa_supplicant/
H A Dwpa_supplicant.82 .\" SPDX-License-Identifier: BSD-2-Clause
38 .Fl c Ar config-file
39 .Op Fl C Ar ctrl
42 .Op Fl g Ar global ctrl
45 .Op Fl O Ar override ctrl
49 .Fl c Ar config-file
50 .Op Fl C Ar ctrl
69 module and can be used to configure static WEP keys
81 text-based
86 .Bl -tag -width indent
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/freebsd/sys/dev/qcom_gcc/
H A Dqcom_gcc_msm8916_clock.c1 /*-
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
38 #include <sys/module.h>
50 #define AHB_CBCR_CLK_ENABLE (1 << 0) /* AHB clk branch ctrl */
52 #define ETR_USB_CBCR_CLK_ENABLE (1 << 0) /* ETR USB clk branch ctrl */
54 #define DAP_CBCR_CLK_ENABLE (1 << 0) /* DAP clk branch ctrl */
65 bus_write_4(sc->reg, GCC_QDSS_BCR, GCC_QDSS_BCR_BLK_ARES); in qcom_msm8916_qdss_enable()
68 bus_write_4(sc->reg, GCC_QDSS_CFG_AHB_CBCR, AHB_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
71 bus_write_4(sc->reg, GCC_QDSS_DAP_CBCR, DAP_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
74 bus_write_4(sc->reg, GCC_QDSS_ETR_USB_CBCR, ETR_USB_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
[all …]
/freebsd/crypto/openssl/test/recipes/30-test_evp_data/
H A Devpmac_common.txt2 # Copyright 2001-2024 The OpenSSL Project Authors. All Rights Reserved.
72 Algorithm = SHA256-192
81 Algorithm = SHA256-192
88 Algorithm = SHA256-192
178 Algorithm = SHA3-224
186 Algorithm = SHA3-224
192 Algorithm = SHA3-224
198 Algorithm = SHA3-256
206 Algorithm = SHA3-256
212 Algorithm = SHA3-256
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/freebsd/sys/dev/iicbus/rtc/
H A Dds1672.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <sys/module.h>
50 #define DS1672_COUNTER 0 /* counter (bytes 0-3) */
100 uint8_t ctrl; in ds1672_init() local
103 error = ds1672_read(dev, DS1672_CTRL, &ctrl, 1); in ds1672_init()
110 if (ctrl & DS1672_CTRL_EOSC) { in ds1672_init()
113 ctrl &= ~DS1672_CTRL_EOSC; /* Start oscillator. */ in ds1672_init()
114 error = ds1672_write(dev, DS1672_CTRL, &ctrl, 1); in ds1672_init()
133 sc->sc_dev = dev; in ds1672_attach()
[all …]
/freebsd/sys/dev/ahci/
H A Dahci_fsl_fdt.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
38 #include <sys/module.h>
177 {"fsl,ls1021a-ahci", QORIQ_AHCI_LS1021A},
178 {"fsl,ls1028a-ahci", QORIQ_AHCI_LS1028A},
179 {"fsl,ls1043a-ahci", QORIQ_AHCI_LS1043A},
180 {"fsl,ls2080a-ahci", QORIQ_AHCI_LS2080A},
181 {"fsl,ls1046a-ahci", QORIQ_AHCI_LS1046A},
182 {"fsl,ls1088a-ahci", QORIQ_AHCI_LS1088A},
183 {"fsl,ls2088a-ahci", QORIQ_AHCI_LS2088A},
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dimx8mp-audiomix.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
18 const: fsl,imx8mp-audio-blk-ctrl
23 power-domains:
30 clock-names:
32 - const: ahb
33 - const: sai1
[all …]
/freebsd/sys/dev/etherswitch/arswitch/
H A Darswitch_phy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2012 Stefan Bethke.
35 #include <sys/module.h>
114 uint32_t data = 0, ctrl; in arswitch_readphy_internal() local
140 for (timeout = 100; timeout--; ) { in arswitch_readphy_internal()
141 ctrl = arswitch_readreg_msb(dev, a); in arswitch_readphy_internal()
142 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) in arswitch_readphy_internal()
168 return (-1); in arswitch_readphy_internal()
175 uint32_t ctrl; in arswitch_writephy_internal() local
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