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123

/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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/linux/include/linux/platform_data/
H A Dgpmc-omap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
58 u32 page_burst_access; /* Multiple access word delay */
59 u32 access; /* Start-cycle to first data valid delay */
78 u32 t_ceasu; /* address setup to CS valid */
94 u32 t_ce; /* access time from CS asertion */
96 u32 t_cez_r; /* read CS deassertion to high Z */
97 u32 t_cez_w; /* write CS deassertion to high Z */
105 u32 t_bacc; /* burst access valid clock to output delay */
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/linux/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
33 #include <linux/omap-gpmc.h>
37 #include <linux/platform_data/mtd-nand-omap2.h>
39 #define DEVICE_NAME "omap-gpmc"
207 /* Structure to save gpmc cs context */
258 /* Define chip-selects as reserved by default until probe completes */
278 void gpmc_cs_write_reg(int cs, int idx, u32 val) in gpmc_cs_write_reg() argument
282 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_reg()
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/linux/include/linux/spi/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
23 /* Max no. of CS supported per spi device */
38 * INTERFACES between SPI controller-side drivers and SPI target protocol handlers,
44 * struct spi_statistics - statistics for spi transfers
45 * @syncp: seqcount to protect members in this struct for per-cpu update
46 * on 32-bi
1103 struct spi_delay delay; global() member
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/linux/drivers/iio/adc/
H A Dad4695.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/delay.h>
22 #include <linux/iio/buffer-dmaengine.h>
38 #include <dt-bindings/iio/adc/adi,ad4695.h>
157 * to control CS and add a delay between the last SCLK and next
208 .name = "ad4695-8",
237 .name = "ad4695-16",
254 .tx_buf = st->regmap_bus_data, in ad4695_regmap_bus_reg_write()
257 if (count > ARRAY_SIZE(st->regmap_bus_data)) in ad4695_regmap_bus_reg_write()
258 return -EINVAL; in ad4695_regmap_bus_reg_write()
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H A Dad4000.c1 // SPDX-License-Identifier: GPL-2.0+
25 #include <linux/iio/buffer-dmaengine.h>
57 .shift = (_offl ? 0 : _storage_bits - _real_bits), \
95 .shift = (_offl ? 0 : _storage_bits - _real_bits), \
122 /* maps adi,sdi-pin property value to enum */
126 [AD4000_SDI_CS] = "cs",
167 /* AD7946, AD7686, AD7688, AD7988-5, AD7693 */
191 /* AD7988-1 */
475 .dev_name = "ad7988-1",
483 .dev_name = "ad7988-5",
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H A Dad7380.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387
16 * ad7389-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7389-4.pdf
17 * adaq4370-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4370-4.pdf
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H A Dad7923.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2012 CS Systemes d'Information
17 #include <linux/delay.h>
47 #define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1))
64 * Length = 8 channels + 4 extra for 8 byte timestamp
97 .shift = 12 - (bits), \
172 for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) { in ad7923_update_scan_mode()
175 st->settings; in ad7923_update_scan_mode()
177 st->tx_buf[len++] = cpu_to_be16(cmd); in ad7923_update_scan_mode()
180 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7923_update_scan_mode()
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/linux/net/ipv4/
H A Dtcp_vegas.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * IEEE Journal on Selected Areas in Communication, 13(8):1465--1480,
10 * ftp://ftp.cs.arizona.edu/xkernel/Papers/jsac.ps
12 * See http://www.cs.arizona.edu/xkernel/ for their implementation.
17 * using fine-grained timers, NewReno, and FACK.
19 * only every-other RTT during slow start, we increase during
29 * o When the sender re-starts from idle, it waits until it has
55 /* There are several situations when we must "re-start" Vegas:
65 * stale info -- both the saved cwnd and congestion feedback are
77 vegas->doing_vegas_now = 1; in vegas_enable()
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/linux/drivers/spi/
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
159 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
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H A Dspi-mt7621.c1 // SPDX-License-Identifier: GPL-2.0
3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver
6 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
7 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
9 // Some parts are based on spi-orion.c:
11 // Copyright (C) 2007-2008 Marvell Ltd.
14 #include <linux/delay.h>
23 #define DRIVER_NAME "spi-mt7621"
67 return spi_controller_get_devdata(spi->controller); in spidev_to_mt7621_spi()
72 return ioread32(rs->base + reg); in mt7621_spi_read()
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H A Dspi-fsl-lpspi.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
23 #include <linux/dma/imx-dma.h>
36 #define FSL_LPSPI_MAX_EDMA_BYTES ((1 << 15) - 1)
154 { .compatible = "fsl,imx7ulp-spi", .data = &imx7ulp_lpspi_devtype_data,},
155 { .compatible = "fsl,imx93-spi", .data = &imx93_lpspi_devtype_data,},
156 { .compatible = "nxp,s32g2-lpspi", .data = &s32g_lpspi_devtype_data,},
164 unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
166 if (fsl_lpspi->rx_buf) { \
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H A Dspi-fsl-qspi.c1 // SPDX-License-Identifier: GPL-2.0+
18 * Based on the original fsl-quadspi.c SPI NOR driver:
26 #include <linux/delay.h>
42 #include <linux/spi/spi-mem.h>
158 #define LUT_PAD(x) (fls(x) - 1)
164 * ---------------------------------------------------
166 * ---------------------------------------------------
179 * 16 bytes at least to trigger a data transfer, even though the extra
279 return q->devtype_data->quirks & QUADSPI_QUIRK_SWAP_ENDIAN; in needs_swap_endian()
284 return q->devtype_data->quirks & QUADSPI_QUIRK_4X_INT_CLK; in needs_4x_clock()
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/linux/Documentation/spi/
H A Dspi-summary.rst5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
51 SPI is only one of the names used by such four-wire protocols, and
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/linux/drivers/mtd/nand/raw/
H A Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
28 * +-------------------------------------------------------------+
30 * +-------------------------------------------------------------+
33 * ECC) sections and potentially an extra one to deal with
39 * +-----------------------------------------
41 * +-----------------------------------------
43 * -------------------------------------------
45 * -------------------------------------------
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H A Darasan-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014 - 2020 Xilinx, Inc.
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
114 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)
124 * struct anfc_op - Defines how to execute an operation
150 * struct anand - Defines the NAND chip related information
153 * @rb: Ready-busy line
157 * @timings: NV-DDR specific timings to use
167 * @cs_idx: Array of chip-select for this device, values are indexes
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H A Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
55 * Direct Addressing - the slave address forms the control information (command
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/linux/drivers/staging/fbtft/
H A Dfbtft-core.c1 // SPDX-License-Identifier: GPL-2.0+
21 #include <linux/delay.h>
41 gpiod_set_value(par->gpio.dc, dc); in fbtft_write_buf_dc()
43 ret = par->fbtftops.write(par, buf, len); in fbtft_write_buf_dc()
45 dev_err(par->info->device, in fbtft_write_buf_dc()
64 512 - text_len, false); in fbtft_dbg_hex()
77 struct device *dev = par->info->device; in fbtft_request_one_gpio()
95 ret = fbtft_request_one_gpio(par, "reset", 0, &par->gpio.reset); in fbtft_request_gpios()
98 ret = fbtft_request_one_gpio(par, "dc", 0, &par->gpio.dc); in fbtft_request_gpios()
101 ret = fbtft_request_one_gpio(par, "rd", 0, &par->gpio.rd); in fbtft_request_gpios()
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/linux/arch/arm/mach-sa1100/
H A Dgeneric.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-sa1100/generic.c
14 #include <linux/delay.h>
15 #include <linux/dma-mapping.h>
23 #include <linux/irqchip/irq-sa11x0.h>
75 * Default power-off for SA1100
81 /* disable internal oscillator, float CS lines */ in sa1100_power_off()
83 /* enable wake-up on GPIO0 (Assabet...) */ in sa1100_power_off()
102 /* Use on-chip reset capability */ in sa11x0_restart()
110 dev->dev.platform_data = data; in sa11x0_register_device()
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/linux/drivers/input/keyboard/
H A Dapplespi.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2015-2018 Federico Lorenzi
6 * Copyright (c) 2017-2018 Ronald Tschalär
26 * SPI-based Protocol
27 * ------------------
40 * fixed, 256-byte size). In that case it will be split over multiple,
47 #include <linux/delay.h>
85 ((KBD_BL_LEVEL_MAX - KBD_BL_LEVEL_MIN) * KBD_BL_LEVEL_SCALE / 255U)
102 …emap Fn key ([0] = no-remap; 1 = left-ctrl, 2 = left-shift, 3 = left-alt, 4 = left-meta, 6 = right
106 MODULE_PARM_DESC(iso_layout, "Enable/Disable hardcoded ISO-layout of the keyboard. ([0] = disabled,…
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/linux/drivers/pci/controller/
H A Dpci-mvebu.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include <linux/delay.h>
27 #include "../pci-bridge-emul.h"
40 #define PCIE_BAR_CTRL_OFF(n) (0x1804 + (((n) - 1) * 4))
130 writel(val, port->base + reg); in mvebu_writel()
135 return readl(port->base + reg); in mvebu_readl()
140 return port->io_target != -1 && port->io_attr != -1; in mvebu_has_ioport()
199 * BAR[0] -> internal registers (needed for MSI)
200 * BAR[1] -> covers all DRAM banks
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/linux/drivers/hid/
H A Dhid-picolcd_fb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2010-2012 by Bruno Prémont <bonbons@linux-vserver.org> *
6 * Copyright (C) 2009 by Rick L. Vinyard, Jr. <rvinyard@cs.nmsu.edu> *
16 #include "hid-picolcd.h"
23 * a 1-bit wide vertical line of the tile.
28 * +----------------+----------------+----------------+----------------+
30 * +----------------+----------------+----------------+----------------+
32 * +----------------+----------------+----------------+----------------+
34 * +----------------+----------------+----------------+----------------+
36 * +----------------+----------------+----------------+----------------+
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/linux/drivers/block/drbd/
H A Ddrbd_state.c1 // SPDX-License-Identifier: GPL-2.0-only
7 Copyright (C) 2001-2008, LINBIT Information Technologies GmbH.
8 Copyright (C) 1999-2008, Philipp Reisner <philipp.reisner@linbit.com>.
9 Copyright (C) 2002-2008, Lars Ellenberg <lars.ellenberg@linbit.com>.
52 idr_for_each_entry(&resource->devices, device, vnr) in count_objects()
70 state_change->n_devices = n_devices; in alloc_state_change()
71 state_change->n_connections = n_connections; in alloc_state_change()
72 state_change->devices = (void *)(state_change + 1); in alloc_state_change()
73 state_change->connections = (void *)&state_change->devices[n_devices]; in alloc_state_change()
74 state_change->peer_devices = (void *)&state_change->connections[n_connections]; in alloc_state_change()
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/linux/arch/um/kernel/
H A Dtime.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015 Anton Ivanov (aivanov@{brocade.com,kot-begemot.co.uk})
5 * Copyright (C) 2012-2014 Cisco Systems
6 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
22 #include <linux/delay.h>
23 #include <linux/time-internal.h>
42 static int time_travel_ext_fd = -1;
56 return (unsigned long long)(jiffies - INITIAL_JIFFIES + in sched_clock()
64 panic("time-travel: time goes backwards %lld -> %lld\n", in time_travel_set_time()
85 printk(KERN_INFO "time-travel: received broadcast 0x%llx\n", bc_message); in _time_travel_print_bc_msg()
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/linux/arch/powerpc/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
8 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
10 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
23 #include <linux/delay.h>
117 * On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
118 * the set its siblings that share the L1-cache.
123 * On some big-cores system, thread_group_l2_cache_map for each CPU
125 * L2-cache.
150 /* Special case - we inhibit secondary thread startup in smp_generic_cpu_bootable()
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