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Searched +full:cros +full:- +full:ec +full:- +full:spi (Results 1 – 22 of 22) sorted by relevance

/linux/Documentation/devicetree/bindings/extcon/
H A Dextcon-usbc-cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/extcon/extcon-usbc-cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC USB Type-C cable and accessories detection
10 - Benson Leung <bleung@chromium.org>
16 The node for this device must be under a cros-ec node like google,cros-ec-spi
17 or google,cros-ec-i2c.
21 const: google,extcon-usbc-cros-ec
23 google,usb-port-id:
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/linux/Documentation/devicetree/bindings/chrome/
H A Dgoogle,cros-ec-typec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Google Chrome OS EC(Embedded Controller) Type C port driver.
10 - Benson Leung <bleung@chromium.org>
11 - Prashant Malani <pmalani@chromium.org>
14 Chrome OS devices have an Embedded Controller(EC) which has access to
17 cros-ec node like google,cros-ec-spi.
21 const: google,cros-ec-typec
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
14 cros_ec: ec@0 {
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
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H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
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/linux/Documentation/devicetree/bindings/regulator/
H A Dgoogle,cros-ec-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/google,cros-ec-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC controlled voltage regulators
10 - Pi-Hsun Shih <pihsun@chromium.org>
17 - $ref: regulator.yaml#
21 const: google,cros-ec-regulator
25 description: Identifier for the voltage regulator to ChromeOS EC.
28 - compatible
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
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H A Dmt8186-corsola.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
26 stdout-path = "serial0:115200n8";
35 backlight_lcd0: backlight-lcd0 {
36 compatible = "pwm-backlight";
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H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
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H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
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/linux/drivers/gpio/
H A Dgpio-cros-ec.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * This driver provides the ability to control GPIOs on the Chrome OS EC.
23 /* Prefix all names to avoid collisions with EC <-> AP nets */
24 static const char cros_ec_gpio_prefix[] = "EC:";
29 const char *name = gc->names[gpio] + strlen(cros_ec_gpio_prefix); in cros_ec_gpio_set()
46 const char *name = gc->names[gpio] + strlen(cros_ec_gpio_prefix); in cros_ec_gpio_get()
55 return -EINVAL; in cros_ec_gpio_get()
60 dev_err(gc->parent, "error getting gpio%d (%s) on EC: %d\n", gpio, name, ret); in cros_ec_gpio_get()
72 const char *name = gc->names[gpio] + strlen(cros_ec_gpio_prefix); in cros_ec_gpio_get_direction()
84 dev_err(gc->parent, "error getting direction of gpio%d (%s) on EC: %d\n", gpio, name, ret); in cros_ec_gpio_get_direction()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
50 this symbol, but new drivers should use the generic gpio-regmap
60 non-sleeping contexts. They can make bitbanged serial protocols
81 numberspace-based functionalities of the sysfs interface.
120 undefined GPIO reference, this is primarily used by SPI to allow a
122 controlled the SPI device's internal chip select mechanism and not
127 # This symbol is selected by both I2C and SPI expanders
137 Enables support for the idio-16 library functions. The idio-16 library
139 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
141 If built as a module its name will be gpio-idio-16.
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/linux/drivers/platform/chrome/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 If you have an ACPI-compatible Chromebook, say Y or M here.
47 The range of memory used is 0xf00000-0x1000000, traditionally
73 devices that have multiple drop-in options for one component.
81 Controller (EC) providing keyboard, battery and power services.
83 protocol for talking to the EC is defined by the bus driver.
94 EC through an I2C bus. This uses a simple byte-level protocol with
102 If you say Y here, you get support for talking to the ChromeOS EC
103 through rpmsg. This uses a simple byte-level protocol with a
104 checksum. Also since there's no addition EC-to-host interrupt, this
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
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H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
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H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
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H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio =
41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
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/linux/sound/soc/codecs/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-soc-88pm860x-y := 88pm860x-codec.o
3 snd-soc-ab8500-code
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/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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