Lines Matching +full:cros +full:- +full:ec +full:- +full:spi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <®_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
51 enable-active-high;
52 vin-supply = <&pp1800_alw>;
56 compatible = "regulator-fixed";
57 regulator-name = "pp1800_alw";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <1800000>;
62 vin-supply = <®_vsys>;
66 compatible = "regulator-fixed";
67 regulator-name = "pp3300_alw";
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 vin-supply = <®_vsys>;
75 /* system wide semi-regulated power rail from charger */
76 reg_vsys: regulator-vsys {
77 compatible = "regulator-fixed";
78 regulator-name = "vsys";
79 regulator-always-on;
80 regulator-boot-on;
83 reserved_memory: reserved-memory {
84 #address-cells = <2>;
85 #size-cells = <2>;
89 compatible = "shared-dma-pool";
91 no-map;
95 sound: mt8183-sound {
97 pinctrl-names = "default",
100 pinctrl-0 = <&aud_pins_default>;
101 pinctrl-1 = <&aud_pins_tdm_out_on>;
102 pinctrl-2 = <&aud_pins_tdm_out_off>;
106 btsco: bt-sco {
107 compatible = "linux,bt-sco";
108 #sound-dai-cells = <0>;
111 wifi_pwrseq: wifi-pwrseq {
112 compatible = "mmc-pwrseq-simple";
113 pinctrl-names = "default";
114 pinctrl-0 = <&wifi_pins_pwrseq>;
117 reset-gpios = <&pio 119 1>;
120 wifi_wakeup: wifi-wakeup {
121 compatible = "gpio-keys";
122 pinctrl-names = "default";
123 pinctrl-0 = <&wifi_pins_wakeup>;
125 wifi_wakeup_event: event-wowlan {
129 wakeup-source;
133 tboard_thermistor1: thermal-sensor1 {
134 compatible = "generic-adc-thermal";
135 #thermal-sensor-cells = <0>;
136 io-channels = <&auxadc 0>;
137 io-channel-names = "sensor-channel";
138 temperature-lookup-table = < (-5000) 1553
167 tboard_thermistor2: thermal-sensor2 {
168 compatible = "generic-adc-thermal";
169 #thermal-sensor-cells = <0>;
170 io-channels = <&auxadc 1>;
171 io-channel-names = "sensor-channel";
172 temperature-lookup-table = < (-5000) 1553
207 proc-supply = <&mt6358_vproc12_reg>;
211 proc-supply = <&mt6358_vproc12_reg>;
215 proc-supply = <&mt6358_vproc12_reg>;
219 proc-supply = <&mt6358_vproc12_reg>;
223 proc-supply = <&mt6358_vproc12_reg>;
227 proc-supply = <&mt6358_vproc11_reg>;
231 proc-supply = <&mt6358_vproc11_reg>;
235 proc-supply = <&mt6358_vproc11_reg>;
239 proc-supply = <&mt6358_vproc11_reg>;
244 #address-cells = <1>;
245 #size-cells = <0>;
249 enable-gpios = <&pio 45 0>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&panel_pins_default>;
252 avdd-supply = <&ppvarn_lcd>;
253 avee-supply = <&ppvarp_lcd>;
254 pp1800-supply = <&pp1800_lcd>;
259 remote-endpoint = <&dsi_out>;
266 remote-endpoint = <&panel_in>;
270 mediatek,broken-save-restore-fw;
274 mali-supply = <&mt6358_vgpu_reg>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&i2c0_pins>;
281 clock-frequency = <400000>;
282 #address-cells = <1>;
283 #size-cells = <0>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&i2c1_pins>;
290 clock-frequency = <100000>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&i2c3_pins>;
297 clock-frequency = <100000>;
298 #address-cells = <1>;
299 #size-cells = <0>;
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c5_pins>;
306 clock-frequency = <100000>;
307 #address-cells = <1>;
308 #size-cells = <0>;
312 pinctrl-names = "default";
313 pinctrl-0 = <&i2c6_pins>;
315 clock-frequency = <100000>;
324 pinctrl-names = "default", "state_uhs";
325 pinctrl-0 = <&mmc0_pins_default>;
326 pinctrl-1 = <&mmc0_pins_uhs>;
327 bus-width = <8>;
328 max-frequency = <200000000>;
329 cap-mmc-highspeed;
330 mmc-hs200-1_8v;
331 mmc-hs400-1_8v;
332 cap-mmc-hw-reset;
333 no-sdio;
334 no-sd;
335 hs400-ds-delay = <0x12814>;
336 vmmc-supply = <&mt6358_vemc_reg>;
337 vqmmc-supply = <&mt6358_vio18_reg>;
338 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
339 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
340 non-removable;
345 pinctrl-names = "default", "state_uhs";
346 pinctrl-0 = <&mmc1_pins_default>;
347 pinctrl-1 = <&mmc1_pins_uhs>;
348 vmmc-supply = <&pp3300_alw>;
349 vqmmc-supply = <&pp1800_alw>;
350 mmc-pwrseq = <&wifi_pwrseq>;
351 bus-width = <4>;
352 max-frequency = <200000000>;
353 cap-sd-highspeed;
354 sd-uhs-sdr50;
355 sd-uhs-sdr104;
356 keep-power-in-suspend;
357 wakeup-source;
358 cap-sdio-irq;
359 non-removable;
360 no-mmc;
361 no-sd;
362 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
363 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
364 #address-cells = <1>;
365 #size-cells = <0>;
367 qca_wifi: qca-wifi@1 {
374 regulator-always-on;
378 Avdd-supply = <&mt6358_vaud28_reg>;
382 vsys-ldo1-supply = <®_vsys>;
383 vsys-ldo2-supply = <®_vsys>;
384 vsys-ldo3-supply = <®_vsys>;
385 vsys-vcore-supply = <®_vsys>;
386 vsys-vdram1-supply = <®_vsys>;
387 vsys-vgpu-supply = <®_vsys>;
388 vsys-vmodem-supply = <®_vsys>;
389 vsys-vpa-supply = <®_vsys>;
390 vsys-vproc11-supply = <®_vsys>;
391 vsys-vproc12-supply = <®_vsys>;
392 vsys-vs1-supply = <®_vsys>;
393 vsys-vs2-supply = <®_vsys>;
394 vs1-ldo1-supply = <&mt6358_vs1_reg>;
395 vs2-ldo1-supply = <&mt6358_vdram1_reg>;
396 vs2-ldo2-supply = <&mt6358_vs2_reg>;
397 vs2-ldo3-supply = <&mt6358_vs2_reg>;
398 vs2-ldo4-supply = <&mt6358_vs2_reg>;
402 regulator-max-microvolt = <900000>;
404 regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
405 regulator-coupled-max-spread = <100000>;
409 regulator-min-microvolt = <2700000>;
410 regulator-max-microvolt = <2700000>;
414 regulator-min-microvolt = <2700000>;
415 regulator-max-microvolt = <2700000>;
419 regulator-min-microvolt = <850000>;
420 regulator-max-microvolt = <1000000>;
422 regulator-coupled-with = <&mt6358_vgpu_reg>;
423 regulator-coupled-max-spread = <100000>;
428 pins-bus {
450 pins-bus {
456 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
457 drive-strength = <6>;
462 pins-bus {
469 input-enable;
470 bias-pull-down;
471 drive-strength = <2>;
475 bt_pins: bt-pins {
476 pins-bt-en {
478 output-low;
482 ec_ap_int_odl: ec-ap-int-odl {
485 input-enable;
486 bias-pull-up;
490 h1_int_od_l: h1-int-od-l {
493 input-enable;
498 pins-bus {
501 mediatek,pull-up-adv = <3>;
506 pins-bus {
509 mediatek,pull-up-adv = <3>;
514 pins-bus {
517 bias-disable;
522 pins-bus {
525 mediatek,pull-up-adv = <3>;
530 pins-bus {
533 bias-disable;
538 pins-bus {
541 mediatek,pull-up-adv = <3>;
546 pins-bus {
549 bias-disable;
553 mmc0_pins_default: mmc0-pins-default {
554 pins-cmd-dat {
564 input-enable;
565 drive-strength = <MTK_DRIVE_14mA>;
566 mediatek,pull-up-adv = <01>;
569 pins-clk {
571 drive-strength = <MTK_DRIVE_14mA>;
572 mediatek,pull-down-adv = <10>;
575 pins-rst {
577 drive-strength = <MTK_DRIVE_14mA>;
578 mediatek,pull-down-adv = <01>;
582 mmc0_pins_uhs: mmc0-pins-uhs {
583 pins-cmd-dat {
593 input-enable;
594 drive-strength = <MTK_DRIVE_14mA>;
595 mediatek,pull-up-adv = <01>;
598 pins-clk {
600 drive-strength = <MTK_DRIVE_14mA>;
601 mediatek,pull-down-adv = <10>;
604 pins-ds {
606 drive-strength = <MTK_DRIVE_14mA>;
607 mediatek,pull-down-adv = <10>;
610 pins-rst {
612 drive-strength = <MTK_DRIVE_14mA>;
613 mediatek,pull-up-adv = <01>;
617 mmc1_pins_default: mmc1-pins-default {
618 pins-cmd-dat {
624 input-enable;
625 mediatek,pull-up-adv = <10>;
628 pins-clk {
630 input-enable;
631 mediatek,pull-down-adv = <10>;
635 mmc1_pins_uhs: mmc1-pins-uhs {
636 pins-cmd-dat {
642 drive-strength = <6>;
643 input-enable;
644 mediatek,pull-up-adv = <10>;
647 pins-clk {
649 drive-strength = <8>;
650 mediatek,pull-down-adv = <10>;
651 input-enable;
655 panel_pins_default: panel-pins-default {
656 panel-reset {
658 output-low;
659 bias-pull-up;
663 pwm0_pin_default: pwm0-pin-default {
666 output-high;
667 bias-pull-up;
675 pins-scp-uart {
682 pins-spi {
687 bias-disable;
692 pins-spi {
697 bias-disable;
702 pins-spi {
706 bias-disable;
708 pins-spi-mi {
710 mediatek,pull-down-adv = <00>;
715 pins-spi {
720 bias-disable;
725 pins-spi {
730 bias-disable;
735 pins-spi {
740 bias-disable;
744 uart0_pins_default: uart0-pins-default {
745 pins-rx {
747 input-enable;
748 bias-pull-up;
750 pins-tx {
755 uart1_pins_default: uart1-pins-default {
756 pins-rx {
758 input-enable;
759 bias-pull-up;
761 pins-tx {
764 pins-rts {
767 pins-cts {
769 input-enable;
773 uart1_pins_sleep: uart1-pins-sleep {
774 pins-rx {
776 input-enable;
777 bias-pull-up;
779 pins-tx {
782 pins-rts {
785 pins-cts {
787 input-enable;
791 wifi_pins_pwrseq: wifi-pins-pwrseq {
792 pins-wifi-enable {
794 output-low;
798 wifi_pins_wakeup: wifi-pins-wakeup {
799 pins-wifi-wakeup {
801 input-enable;
807 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&pwm0_pin_default>;
819 firmware-name = "mediatek/mt8183/scp.img";
820 pinctrl-names = "default";
821 pinctrl-0 = <&scp_pins>;
823 cros-ec-rpmsg {
824 compatible = "google,cros-ec-rpmsg";
825 mediatek,rpmsg-name = "cros-ec-rpmsg";
830 domain-supply = <&mt6358_vsram_gpu_reg>;
834 domain-supply = <&mt6358_vgpu_reg>;
838 pinctrl-names = "default";
839 pinctrl-0 = <&spi0_pins>;
840 mediatek,pad-select = <0>;
842 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
847 spi-max-frequency = <1000000>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&h1_int_od_l>;
850 interrupts-extended = <&pio 153 IRQ_TYPE_EDGE_RISING>;
855 pinctrl-names = "default";
856 pinctrl-0 = <&spi1_pins>;
857 mediatek,pad-select = <0>;
861 compatible = "winbond,w25q64dw", "jedec,spi-nor";
863 spi-max-frequency = <25000000>;
868 pinctrl-names = "default";
869 pinctrl-0 = <&spi2_pins>;
870 mediatek,pad-select = <0>;
873 cros_ec: cros-ec@0 {
874 compatible = "google,cros-ec-spi";
876 spi-max-frequency = <3000000>;
877 interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>;
878 pinctrl-names = "default";
879 pinctrl-0 = <&ec_ap_int_odl>;
880 wakeup-source;
882 i2c_tunnel: i2c-tunnel {
883 compatible = "google,cros-ec-i2c-tunnel";
884 google,remote-bus = <1>;
885 #address-cells = <1>;
886 #size-cells = <0>;
890 compatible = "google,extcon-usbc-cros-ec";
891 google,usb-port-id = <0>;
895 compatible = "google,cros-ec-typec";
896 #address-cells = <1>;
897 #size-cells = <0>;
900 compatible = "usb-c-connector";
902 power-role = "dual";
903 data-role = "host";
904 try-power-role = "sink";
911 pinctrl-names = "default";
912 pinctrl-0 = <&spi3_pins>;
913 mediatek,pad-select = <0>;
918 pinctrl-names = "default";
919 pinctrl-0 = <&spi4_pins>;
920 mediatek,pad-select = <0>;
925 pinctrl-names = "default";
926 pinctrl-0 = <&spi5_pins>;
927 mediatek,pad-select = <0>;
933 wakeup-source;
934 vusb33-supply = <&mt6358_vusb_reg>;
939 tboard1-thermal {
940 polling-delay = <1000>; /* milliseconds */
941 polling-delay-passive = <0>; /* milliseconds */
942 thermal-sensors = <&tboard_thermistor1>;
945 tboard2-thermal {
946 polling-delay = <1000>; /* milliseconds */
947 polling-delay-passive = <0>; /* milliseconds */
948 thermal-sensors = <&tboard_thermistor2>;
957 pinctrl-names = "default";
958 pinctrl-0 = <&uart0_pins_default>;
963 pinctrl-names = "default", "sleep";
964 pinctrl-0 = <&uart1_pins_default>;
965 pinctrl-1 = <&uart1_pins_sleep>;
967 /delete-property/ interrupts;
968 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
972 pinctrl-names = "default";
973 pinctrl-0 = <&bt_pins>;
975 compatible = "qcom,qca6174-bt";
976 enable-gpios = <&pio 120 0>;
978 firmware-name = "nvm_00440302_i2s.bin";
983 #address-cells = <1>;
984 #size-cells = <0>;
985 vusb33-supply = <&mt6358_vusb_reg>;
994 #include <arm/cros-ec-sbs.dtsi>