/linux/Documentation/devicetree/bindings/mfd/ |
H A D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benson Leung <bleung@chromium.org> 11 - Guenter Roeck <groeck@chromium.org> 14 Google's ChromeOS EC is a microcontroller which talks to the AP and 16 The EC can be connected through various interfaces (I2C, SPI, and others) 22 - description: 23 For implementations of the EC connected through I2C. [all …]
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | google,cros-ec-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/google,cros-ec-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ChromeOS EC controlled voltage regulators 10 - Pi-Hsun Shih <pihsun@chromium.org> 13 Any property defined as part of the core regulator binding, defined in 14 regulator.yaml, can also be used. 17 - $ref: regulator.yaml# 21 const: google,cros-ec-regulator [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <®_vsys>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; 31 default-brightness-level = <576>; [all …]
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H A D | mt8186-corsola.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h> 26 stdout-path = "serial0:115200n8"; 35 backlight_lcd0: backlight-lcd0 { 36 compatible = "pwm-backlight"; [all …]
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H A D | mt8183-kukui-jacuzzi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "mt8183-kukui.dtsi" 7 /* Must come after mt8183-kukui.dtsi to modify cros_ec */ 8 #include <arm/cros-ec-keyboard.dtsi> 11 pp1000_mipibrdg: pp1000-mipibrdg { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp1000_mipibrdg"; 14 regulator-min-microvolt = <1000000>; 15 regulator-max-microvolt = <1000000>; 16 pinctrl-names = "default"; [all …]
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H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&panel_backlight_en_pins>; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7280-herobrine.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/leds/common.h> 20 #include "sc7280-qcard.dtsi" 21 #include "sc7280-chrome-common.dtsi" 25 stdout-path = "serial0:115200n8"; 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; [all …]
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H A D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 9 #include "rk3399-op1.dtsi" 18 stdout-path = "serial2:115200n8"; 27 * - Rails that only connect to the EC (or devices that the EC talks to) 29 * - Rails _are_ included if the rails go to the AP even if the AP 35 * view, though, we won't create a full fixed regulator. We'll just 38 * - The EC controls the enable and the EC always enables a rail as 40 * - The rails are actually connected to each other by a jumper and [all …]
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/linux/drivers/regulator/ |
H A D | cros-ec-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/regulator/driver.h> 10 #include <linux/regulator/machine.h> 11 #include <linux/regulator/of_regulator.h> 29 .index = data->index, in cros_ec_regulator_enable() 33 return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, in cros_ec_regulator_enable() 41 .index = data->index, in cros_ec_regulator_disable() 45 return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, in cros_ec_regulator_disable() 53 .index = data->index, in cros_ec_regulator_is_enabled() 58 ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_IS_ENABLED, &cmd, in cros_ec_regulator_is_enabled() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for regulator drivers. 7 obj-$(CONFIG_REGULATOR) += core.o dummy.o fixed-helper.o helpers.o devres.o irq_helpers.o 8 obj-$(CONFIG_REGULATOR_NETLINK_EVENTS) += event.o 9 obj-$(CONFIG_OF) += of_regulator.o 10 obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o 11 obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o 12 obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o 14 obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o 15 obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menuconfig REGULATOR config 3 bool "Voltage and Current Regulator Support" 6 Generic Voltage and Current Regulator support. 14 The intention is to allow systems to dynamically control regulator 26 if REGULATOR 29 bool "Regulator debug support" 34 tristate "Fixed voltage regulator support" 38 managed regulators and simple non-configurable regulators. 41 tristate "Virtual regulator consumer support" [all …]
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/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-node/ memory@80000000; 40 vdd-supply = <&vdd_3v3_hdmi>; 41 pll-supply = <&vdd_hdmi_pll>; 42 hdmi-supply = <&vdd_5v0_hdmi>; [all …]
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H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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/linux/drivers/platform/chrome/ |
H A D | cros_ec.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * ChromeOS EC multi-function device 7 * The ChromeOS EC multi function device is used to mux all the requests 8 * to the EC device for its multiple features: keyboard controller, 9 * battery charging and regulator control, firmware update. 34 * cros_ec_irq_handler() - top half part of the interrupt handler 44 ec_dev->last_event_time = cros_ec_get_time_ns(); in cros_ec_irq_handler() 50 * cros_ec_handle_event() - process and forward pending events on EC 53 * Call this function in a loop when the kernel is notified that the EC has 72 if (wake_event && device_may_wakeup(ec_dev->dev)) in cros_ec_handle_event() [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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H A D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/input/input.h> 19 chassis-type = "laptop"; 33 stdout-path = "serial3:115200n8"; 36 gpio-keys { 37 compatible = "gpio-keys"; [all …]
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H A D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 30 stdout-path = "serial3:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-names = "default"; [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-jaq.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "rk3288-veyron-chromebook.dtsi" 11 #include "../cros-ec-sbs.dtsi" 15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", 16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2", 17 "google,veyron-jaq-rev1", "google,veyron-jaq", 22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */ 23 brightness-levels = <8 255>; 24 num-interpolated-steps = <247>; [all …]
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H A D | rk3288-veyron-jerry.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3288-veyron-chromebook.dtsi" 10 #include "../cros-ec-sbs.dtsi" 14 compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14", 15 "google,veyron-jerry-rev13", "google,veyron-jerry-rev12", 16 "google,veyron-jerry-rev11", "google,veyron-jerry-rev10", 17 "google,veyron-jerry-rev7", "google,veyron-jerry-rev6", 18 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4", 19 "google,veyron-jerry-rev3", "google,veyron-jerry", [all …]
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/linux/include/linux/platform_data/ |
H A D | cros_ec_commands.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Host communication command constants for ChromeOS EC 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 11 /* Host communication command constants for Chrome EC */ 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 56 * MEC series EC; an attempt to address a larger region may fail. 63 /* EC command register bit functions */ 65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ [all …]
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/linux/drivers/mfd/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 57 tristate "Active-semi ACT8945A" 62 Support for the ACT8945A PMIC from Active-semi. This device 63 features three step-down DC/DC converters and four low-dropout 79 sun4i-gpadc-iio and the hwmon driver iio_hwmon. 82 called sun4i-gpadc. 113 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down 144 over at91-usart-serial driver and usart-spi-driver. Only one function 160 tristate "Atmel HLCDC (High-end LCD Controller)" 190 voltage regulator, voltage sampling units, GPIO block and [all …]
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