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/linux/kernel/events/
H A Dhw_breakpoint.c1 // SPDX-License-Identifier: GPL-2.0+
15 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
16 * using the CPU's debug registers.
17 * This file contains the arch-independent routines.
24 #include <linux/cpu.h>
32 #include <linux/percpu-rwsem.h>
51 * Per-CPU constraints data.
54 /* Number of pinned CPU breakpoints in a CPU. */
56 /* Histogram of pinned task breakpoints in a CPU. */
62 static struct bp_cpuinfo *get_bp_info(int cpu, enum bp_type_idx type) in get_bp_info() argument
[all …]
/linux/drivers/base/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
15 #include <linux/cpu.h>
25 /* pointer to per cpu cacheinfo */
27 #define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu)) argument
28 #define cache_leaves(cpu) (ci_cacheinf argument
26 ci_cacheinfo(cpu) global() argument
29 per_cpu_cacheinfo_idx(cpu,idx) global() argument
35 get_cpu_cacheinfo(unsigned int cpu) get_cpu_cacheinfo() argument
58 last_level_cache_is_valid(unsigned int cpu) last_level_cache_is_valid() argument
115 get_cacheinfo_idx(enum cache_type type) get_cacheinfo_idx() argument
187 match_cache_node(struct device_node * cpu,const struct device_node * cache_node) match_cache_node() argument
213 struct device_node *cpu; cache_of_set_id() local
253 cache_setup_of_node(unsigned int cpu) cache_setup_of_node() argument
327 init_of_cache_level(unsigned int cpu) init_of_cache_level() argument
365 cache_setup_of_node(unsigned int cpu) cache_setup_of_node() argument
366 init_of_cache_level(unsigned int cpu) init_of_cache_level() argument
369 cache_setup_acpi(unsigned int cpu) cache_setup_acpi() argument
376 cache_setup_properties(unsigned int cpu) cache_setup_properties() argument
392 cache_shared_cpu_map_setup(unsigned int cpu) cache_shared_cpu_map_setup() argument
451 cache_shared_cpu_map_remove(unsigned int cpu) cache_shared_cpu_map_remove() argument
488 free_cache_attributes(unsigned int cpu) free_cache_attributes() argument
496 early_cache_level(unsigned int cpu) early_cache_level() argument
501 init_cache_level(unsigned int cpu) init_cache_level() argument
506 populate_cache_leaves(unsigned int cpu) populate_cache_leaves() argument
511 allocate_cache_info(int cpu) allocate_cache_info() argument
523 fetch_cache_info(unsigned int cpu) fetch_cache_info() argument
559 init_level_allocate_ci(unsigned int cpu) init_level_allocate_ci() argument
597 detect_cache_attributes(unsigned int cpu) detect_cache_attributes() argument
639 per_cpu_cache_dev(cpu) global() argument
645 per_cpu_index_dev(cpu) global() argument
646 per_cache_index_dev(cpu,idx) global() argument
855 cpu_cache_sysfs_exit(unsigned int cpu) cpu_cache_sysfs_exit() argument
874 cpu_cache_sysfs_init(unsigned int cpu) cpu_cache_sysfs_init() argument
898 cache_add_dev(unsigned int cpu) cache_add_dev() argument
934 cpu_map_shared_cache(bool online,unsigned int cpu,cpumask_t ** map) cpu_map_shared_cache() argument
976 update_per_cpu_data_slice_size_cpu(unsigned int cpu) update_per_cpu_data_slice_size_cpu() argument
996 update_per_cpu_data_slice_size(bool cpu_online,unsigned int cpu,cpumask_t * cpu_map) update_per_cpu_data_slice_size() argument
1009 cacheinfo_cpu_online(unsigned int cpu) cacheinfo_cpu_online() argument
1027 cacheinfo_cpu_pre_down(unsigned int cpu) cacheinfo_cpu_pre_down() argument
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
[all …]
H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
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/linux/kernel/sched/
H A Disolation.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * any CPU: unbound workqueues, timers, kthreads and any offloadable work.
7 * Copyright (C) 2017-2018 SUSE, Frederic Weisbecker
31 bool housekeeping_enabled(enum hk_type type) in housekeeping_enabled() argument
33 return !!(READ_ONCE(housekeeping.flags) & BIT(type)); in housekeeping_enabled()
37 static bool housekeeping_dereference_check(enum hk_type type) in housekeeping_dereference_check() argument
39 if (IS_ENABLED(CONFIG_LOCKDEP) && type == HK_TYPE_DOMAIN) { in housekeeping_dereference_check()
44 /* CPU hotplug write locked, so cpuset partition can't be overwritten */ in housekeeping_dereference_check()
58 static inline struct cpumask *housekeeping_cpumask_dereference(enum hk_type type) in housekeeping_cpumask_dereference() argument
60 return rcu_dereference_all_check(housekeeping.cpumasks[type], in housekeeping_cpumask_dereference()
[all …]
/linux/drivers/bus/
H A Dmips_cdmm.c4 * Copyright (C) 2014-2015 Imagination Technologies Ltd.
13 #include <linux/cpu.h>
53 for (; table->type; ++table) { in mips_cdmm_lookup()
54 ret = (dev->type == table->type); in mips_cdmm_lookup()
67 return mips_cdmm_lookup(cdrv->id_table, cdev) != NULL; in mips_cdmm_match()
75 retval = add_uevent_var(env, "CDMM_CPU=%u", cdev->cpu); in mips_cdmm_uevent()
79 retval = add_uevent_var(env, "CDMM_TYPE=0x%02x", cdev->type); in mips_cdmm_uevent()
83 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev); in mips_cdmm_uevent()
87 retval = add_uevent_var(env, "MODALIAS=mipscdmm:t%02X", cdev->type); in mips_cdmm_uevent()
102 CDMM_ATTR(cpu, "%u\n", dev->cpu);
[all …]
H A Darm-cci.c17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
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/linux/tools/perf/util/bpf_skel/
H A Dkwork_top.bpf.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
40 __u32 type; member
47 __u32 cpu; member
51 __uint(type, BPF_MAP_TYPE_TASK_STORAGE);
58 __uint(type, BPF_MAP_TYPE_PERCPU_HASH);
65 __uint(type, BPF_MAP_TYPE_HASH);
72 __uint(type, BPF_MAP_TYPE_PERCPU_HASH);
79 __uint(type, BPF_MAP_TYPE_HASH);
92 static __always_inline int cpu_is_filtered(__u32 cpu) in cpu_is_filtered() argument
97 cpu_val = bpf_map_lookup_elem(&kwork_top_cpu_filter, &cpu); in cpu_is_filtered()
[all …]
H A Dkwork_trace.bpf.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
22 __u32 type; member
23 __u32 cpu; member
36 __uint(type, BPF_MAP_TYPE_HASH);
43 __uint(type, BPF_MAP_TYPE_HAS
95 __u32 cpu = bpf_get_smp_processor_id(); trace_event_match() local
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/linux/tools/perf/tests/
H A Dperf-record.c1 // SPDX-License-Identifier: GPL-2.0
20 int i, cpu = -1; in sched__get_first_possible_cpu() local
21 int nrcpus = cpu__max_cpu().cpu; in sched__get_first_possible_cpu()
27 if (sched_getaffinity(pid, size, maskp) == -1) { in sched__get_first_possible_cpu()
28 if (errno == EINVAL && nrcpus < (cpu__max_cpu().cpu << 8)) { in sched__get_first_possible_cpu()
33 return -1; in sched__get_first_possible_cpu()
38 if (cpu in sched__get_first_possible_cpu()
73 u32 cpu; test__PERF_RECORD() local
197 const u32 type = event->header.type; test__PERF_RECORD() local
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 cpu-alert-0 {
13 type = "passive";
15 cpu-alert-1 {
18 type = "passive";
20 cpu-alert-2 {
23 type = "passive";
25 cpu-alert-3 {
28 type = "passive";
30 cpu-alert-4 {
[all …]
/linux/Documentation/devicetree/bindings/powerpc/
H A Dibm,powerpc-cpu-features.txt3 (skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
9 ibm,powerpc-cpu-features binding
12 This device tree binding describes CPU features available to software, with
19 /cpus/ibm,powerpc-cpu-features node binding
20 -------------------------------------------
22 Node: ibm,powerpc-cpu-features
24 Description: Container of CPU feature nodes.
26 The node name must be "ibm,powerpc-cpu-features".
35 - compatible
37 Value type: string
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/linux/tools/bpf/bpftool/
H A Dmap_perf_ring.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
53 int cpu; member
58 print_bpf_output(void *private_data, int cpu, struct perf_event_header *event) in print_bpf_output() argument
67 int idx = ctx->all_cpus ? cpu : ctx->idx; in print_bpf_output()
71 jsonw_name(json_wtr, "type"); in print_bpf_output()
72 jsonw_uint(json_wtr, e->header.type); in print_bpf_output()
73 jsonw_name(json_wtr, "cpu"); in print_bpf_output()
74 jsonw_uint(json_wtr, cpu); in print_bpf_output()
77 if (e->header.type == PERF_RECORD_SAMPLE) { in print_bpf_output()
79 jsonw_uint(json_wtr, e->time); in print_bpf_output()
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/linux/Documentation/devicetree/bindings/csky/
H A Dcpus.txt2 C-SKY CPU Bindings
6 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7 defining properties for every cpu.
13 cpus and cpu node bindings definition
16 - cpus node
18 Description: Container of cpu nodes
24 - #address-cells
26 Value type: <u32>
28 - #size-cells
30 Value type: <u32>
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/linux/net/core/
H A Dgen_stats.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 gnet_stats_copy(struct gnet_dump *d, int type, void *buf, int size, int padattr) in gnet_stats_copy() argument
26 if (nla_put_64bit(d->skb, type, size, buf, padattr)) in gnet_stats_copy()
31 if (d->lock) in gnet_stats_copy()
32 spin_unlock_bh(d->loc in gnet_stats_copy()
59 gnet_stats_start_copy_compat(struct sk_buff * skb,int type,int tc_stats_type,int xstats_type,spinlock_t * lock,struct gnet_dump * d,int padattr) gnet_stats_start_copy_compat() argument
110 gnet_stats_start_copy(struct sk_buff * skb,int type,spinlock_t * lock,struct gnet_dump * d,int padattr) gnet_stats_start_copy() argument
127 gnet_stats_add_basic_cpu(struct gnet_stats_basic_sync * bstats,struct gnet_stats_basic_sync __percpu * cpu) gnet_stats_add_basic_cpu() argument
150 gnet_stats_add_basic(struct gnet_stats_basic_sync * bstats,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,bool running) gnet_stats_add_basic() argument
175 gnet_stats_read_basic(u64 * ret_bytes,u64 * ret_packets,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,bool running) gnet_stats_read_basic() argument
212 ___gnet_stats_copy_basic(struct gnet_dump * d,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,int type,bool running) ___gnet_stats_copy_basic() argument
214 ___gnet_stats_copy_basic(struct gnet_dump * d,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,int type,bool running) ___gnet_stats_copy_basic() argument
261 gnet_stats_copy_basic(struct gnet_dump * d,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,bool running) gnet_stats_copy_basic() argument
288 gnet_stats_copy_basic_hw(struct gnet_dump * d,struct gnet_stats_basic_sync __percpu * cpu,struct gnet_stats_basic_sync * b,bool running) gnet_stats_copy_basic_hw() argument
357 gnet_stats_add_queue(struct gnet_stats_queue * qstats,const struct gnet_stats_queue __percpu * cpu,const struct gnet_stats_queue * q) gnet_stats_add_queue() argument
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/linux/arch/x86/kernel/acpi/
H A Dcstate.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * - Added _PDC for SMP C-states on Intel CPUs
12 #include <linux/cpu.h>
23 * Initialize bm_flags based on the CPU cache properties
25 * - When cache is not shared among all CPUs, we flush cache
27 * - When cache is shared among all CPUs, we use bm_check
33 unsigned int cpu) in acpi_processor_power_init_bm_check() argument
35 struct cpuinfo_x86 *c = &cpu_data(cpu); in acpi_processor_power_init_bm_check()
37 flags->bm_check = 0; in acpi_processor_power_init_bm_check()
39 flags->bm_check = 1; in acpi_processor_power_init_bm_check()
[all …]
/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
42 - when a DSA user interface is brought up, the conduit interface is
44 - when the conduit interface is brought down, all DSA user interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
72 * lan2: 192.0.2.5/30 (192.0.2.4 - 192.0.2.7)
73 * lan3: 192.0.2.9/30 (192.0.2.8 - 192.0.2.11)
76 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
[all …]
/linux/arch/arm64/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Contains CPU feature definitions
9 * there's a little bit of over-abstraction that tends to obscure what's going
14 * user-visible instructions are available only on a subset of the available
16 * boot CPU and comparing these with the feature registers of each secondary
17 * CPU when bringing them up. If there is a mismatch, then we update the
18 * snapshot state to indicate the lowest-commo
194 __ARM64_FTR_BITS(SIGNED,VISIBLE,STRICT,TYPE,SHIFT,WIDTH,SAFE_VAL) global() argument
206 ARM64_FTR_BITS(VISIBLE,STRICT,TYPE,SHIFT,WIDTH,SAFE_VAL) global() argument
210 S_ARM64_FTR_BITS(VISIBLE,STRICT,TYPE,SHIFT,WIDTH,SAFE_VAL) global() argument
1240 check_update_ftr_reg(u32 sys_id,int cpu,u64 val,u64 boot) check_update_ftr_reg() argument
1290 update_32bit_cpu_features(int cpu,struct cpuinfo_32bit * info,struct cpuinfo_32bit * boot) update_32bit_cpu_features() argument
1366 update_cpu_features(int cpu,struct cpuinfo_arm64 * info,struct cpuinfo_arm64 * boot) update_cpu_features() argument
2037 cpu_has_amu_feat(int cpu) cpu_has_amu_feat() argument
2499 int cpu = smp_processor_id(); cpu_enable_mpam() local
4018 enable_mismatched_32bit_el0(unsigned int cpu) enable_mismatched_32bit_el0() argument
[all...]
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
35 enum cache_type type, unsigned int level) in ci_leaf_init() argument
37 this_leaf->level = level; in ci_leaf_init()
38 this_leaf->type = type; in ci_leaf_init()
48 level--; in detect_cache_level()
59 int early_cache_level(unsigned int cpu) in early_cache_level() argument
61 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in early_cache_level()
63 detect_cache_level(&this_cpu_ci->num_levels, &this_cpu_ci->num_leaves); in early_cache_level()
68 int init_cache_level(unsigned int cpu) in init_cache_level() argument
72 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in init_cache_level()
[all …]
/linux/arch/x86/events/intel/
H A Duncore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <asm/intel-family.h>
44 int die_id = -1; in uncore_pcibus_to_dieid()
48 if (map->segment == pci_domain_nr(bus)) { in uncore_pcibus_to_dieid()
49 die_id = map->pbus_to_dieid[bus->number]; in uncore_pcibus_to_dieid()
67 return bus ? pci_domain_nr(bus) : -EINVA in uncore_die_to_segment()
74 int cpu; uncore_device_to_die() local
140 uncore_pmu_to_box(struct intel_uncore_pmu * pmu,int cpu) uncore_pmu_to_box() argument
347 uncore_alloc_box(struct intel_uncore_type * type,int node) uncore_alloc_box() argument
426 struct intel_uncore_type *type = box->pmu->type; uncore_get_event_constraint() local
859 uncore_get_box_id(struct intel_uncore_type * type,struct intel_uncore_pmu * pmu) uncore_get_box_id() argument
870 struct intel_uncore_type *type = pmu->type; uncore_get_alias_name() local
882 struct intel_uncore_type *type = pmu->type; uncore_get_pmu_name() local
958 uncore_type_exit(struct intel_uncore_type * type) uncore_type_exit() argument
988 uncore_type_init(struct intel_uncore_type * type) uncore_type_init() argument
1080 struct intel_uncore_type *type; uncore_pci_find_dev_pmu_from_types() local
1108 struct intel_uncore_type *type; uncore_pci_find_dev_pmu() local
1140 uncore_pci_pmu_register(struct pci_dev * pdev,struct intel_uncore_type * type,struct intel_uncore_pmu * pmu,int die) uncore_pci_pmu_register() argument
1179 struct intel_uncore_type *type; uncore_pci_probe() local
1306 struct intel_uncore_type *type; uncore_pci_sub_driver_init() local
1361 struct intel_uncore_type *type; uncore_pci_pmus_register() local
1443 uncore_die_has_box(struct intel_uncore_type * type,int die,unsigned int pmu_idx) uncore_die_has_box() argument
1455 uncore_change_type_ctx(struct intel_uncore_type * type,int old_cpu,int new_cpu) uncore_change_type_ctx() argument
1501 struct intel_uncore_type *type; uncore_box_unref() local
1517 uncore_event_cpu_offline(unsigned int cpu) uncore_event_cpu_offline() argument
1546 allocate_boxes(struct intel_uncore_type ** types,unsigned int die,unsigned int cpu) allocate_boxes() argument
1549 struct intel_uncore_type *type; allocate_boxes() local
1585 uncore_box_ref(struct intel_uncore_type ** types,int id,unsigned int cpu) uncore_box_ref() argument
1587 struct intel_uncore_type *type; uncore_box_ref() local
1608 uncore_event_cpu_online(unsigned int cpu) uncore_event_cpu_online() argument
1636 type_pmu_register(struct intel_uncore_type * type) type_pmu_register() argument
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/linux/include/linux/sched/
H A Disolation.h9 /* Inverse of boot-time isolcpus= argument */
17 /* Inverse of boot-time isolcpus=managed_irq argument */
19 /* Inverse of boot-time nohz_full= or isolcpus=nohz arguments */
41 extern int housekeeping_any_cpu(enum hk_type type);
42 extern const struct cpumask *housekeeping_cpumask(enum hk_type type);
43 extern bool housekeeping_enabled(enum hk_type type);
44 extern void housekeeping_affine(struct task_struct *t, enum hk_type type);
45 extern bool housekeeping_test_cpu(int cpu, enum hk_type type);
51 static inline int housekeeping_any_cpu(enum hk_type type) in housekeeping_any_cpu() argument
56 static inline const struct cpumask *housekeeping_cpumask(enum hk_type type) in housekeeping_cpumask() argument
[all …]
/linux/arch/x86/kernel/
H A Dnmi.c1 // SPDX-License-Identifier: GPL-2.0-only
36 #include <asm/nospec-branch.h>
53 #define NMI_DESC_INIT(type) { \ argument
54 .lock = __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[type].lock), \
55 .head = LIST_HEAD_INIT(nmi_desc[type].head), \
65 #define nmi_to_desc(type) (&nmi_desc[type]) argument
131 nmi_handle(unsigned int type,struct pt_regs * regs) nmi_handle() argument
178 __register_nmi_handler(unsigned int type,struct nmiaction * action) __register_nmi_handler() argument
209 unregister_nmi_handler(unsigned int type,const char * name) unregister_nmi_handler() argument
249 set_emergency_nmi_handler(unsigned int type,nmi_handler_t handler) set_emergency_nmi_handler() argument
641 int cpu; nmi_backtrace_stall_snap() local
655 int cpu; nmi_backtrace_stall_check() local
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/linux/tools/perf/arch/arm/util/
H A Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/coresight-pmu.h>
18 #include "cs-etm.h"
29 #include "../../../util/cs-etm.h"
71 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu);
72 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val);
73 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path);
76 struct perf_cpu cpu) in cs_etm_get_version() argument
78 if (cs_etm_is_ete(cs_etm_pmu, cpu)) in cs_etm_get_version()
80 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0])) in cs_etm_get_version()
[all …]
/linux/arch/s390/kernel/
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0
3 * Extract CPU cache information and expose them via sysfs.
9 #include <linux/cpu.h>
43 unsigned char type : 2; member
74 for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) { in show_cacheinfo()
75 cache = this_cpu_ci->info_list + idx; in show_cacheinfo()
76 seq_printf(m, "cache%-11d: ", idx); in show_cacheinfo()
77 seq_printf(m, "level=%d ", cache->level); in show_cacheinfo()
78 seq_printf(m, "type=%s ", cache_type_string[cache->type]); in show_cacheinfo()
80 cache->disable_sysfs ? "Shared" : "Private"); in show_cacheinfo()
[all …]
/linux/arch/x86/include/asm/
H A Ddesc.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 desc->limit0 = info->limit & 0x0ffff; in fill_ldt()
20 desc->base0 = (info->base_addr & 0x0000ffff); in fill_ldt()
21 desc->base1 = (info->base_addr & 0x00ff0000) >> 16; in fill_ldt()
23 desc->type = (info->read_exec_only ^ 1) << 1; in fill_ldt()
24 desc->type |= info->contents << 2; in fill_ldt()
26 desc->type |= 1; in fill_ldt()
28 desc->s = 1; in fill_ldt()
29 desc->dpl = 0x3; in fill_ldt()
30 desc->p = info->seg_not_present ^ 1; in fill_ldt()
[all …]

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