/linux/Documentation/devicetree/bindings/thermal/ |
H A D | brcm,sr-thermal.txt | 1 * Broadcom Stingray Thermal 3 This binding describes thermal sensors that is part of Stingray SoCs. 6 - compatible : Must be "brcm,sr-thermal" 7 - reg : Memory where tmon data will be available. 8 - brcm,tmon-mask: A one cell bit mask of valid TMON sources. 10 - #thermal-sensor-cells : Thermal sensor phandler 11 - polling-delay: Max number of milliseconds to wait between polls. 12 - thermal-sensors: A list of thermal sensor phandles and specifier. 14 in correspond with brcm,tmon-mask. 15 - temperature: trip temperature threshold in millicelsius. [all …]
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H A D | nvidia,tegra124-soctherm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra124-soctherm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra124 SOCTHERM Thermal Management System 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The SOCTHERM IP block contains thermal sensors, support for 14 polled or interrupt-based thermal monitoring, CPU and GPU throttling based 21 - nvidia,tegra124-soctherm [all …]
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H A D | thermal-idle.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Thermal idle cooling device 11 - Daniel Lezcano <daniel.lezcano@linaro.org> 14 The thermal idle cooling device allows the system to passively 18 This binding describes the thermal idle node. 22 const: thermal-idle 24 A thermal-idle node describes the idle cooling device properties to [all …]
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H A D | amlogic,thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/amlogic,thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Thermal 10 - Guillaume La Roque <glaroque@baylibre.com> 12 description: Binding for Amlogic Thermal 14 $ref: thermal-sensor.yaml# 19 - items: 20 - enum: [all …]
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H A D | thermal-cooling-devices.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Thermal cooling device 11 - Amit Kucheria <amitk@kernel.org> 14 Thermal management is achieved in devicetree by describing the sensor hardware 15 and the software abstraction of cooling devices and thermal zones required to 16 take appropriate action to mitigate thermal overload. 18 The following node types are used to completely describe a thermal management [all …]
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H A D | st,stm32-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 digital thermal sensor (DTS) 10 - Pascal Paillet <p.paillet@foss.st.com> 12 $ref: thermal-sensor.yaml# 16 const: st,stm32-thermal 27 clock-names: 29 - const: pclk [all …]
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H A D | brcm,ns-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom Northstar Thermal 10 - Rafał Miłecki <rafal@milecki.pl> 13 Thermal sensor that is part of Northstar's DMU (Device Management Unit). 16 - $ref: thermal-sensor.yaml# 20 const: brcm,ns-thermal 26 "#thermal-sensor-cells": [all …]
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H A D | rcar-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 5 $id: http://devicetree.org/schemas/thermal/rcar-thermal.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Thermal 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 16 - items: 17 - enum: 18 - renesas,thermal-r8a73a4 # R-Mobile APE6 19 - renesas,thermal-r8a7779 # R-Car H1 [all …]
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/linux/drivers/thermal/intel/ |
H A D | therm_throt.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Thermal throttle event support code (such as syslog messaging and rate 6 * This allows consistent reporting of CPU thermal throttle events. 8 * Maintains a counter in /sys that keeps track of the number of thermal 9 * events, such that the user knows how bad the thermal problem might be 26 #include <linux/cpu.h> 29 #include <asm/thermal.h> 38 /* How long to wait between reporting thermal events */ 45 * struct _thermal_state - Represent the current thermal event state 51 * @count: Stores the current running count for thermal [all …]
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H A D | intel_tcc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * intel_tcc.c - Library for Intel TCC (thermal control circuitry) MSR access 10 #include <asm/intel-family.h> 14 * struct temp_masks - Bitmasks for temperature readings 129 memcpy(&intel_tcc_temp_masks, (const void *)id->driver_data, in intel_tcc_init() 141 * intel_tcc_get_offset_mask() - Returns the bitmask to read TCC offset 143 * Get the model-specific bitmask to extract TCC_OFFSET from the MSR 147 * Return: The model-specific bitmask for TCC offset. 156 * get_temp_mask() - Returns the model-specific bitmask for temperature 158 * @pkg: true: Package Thermal Sensor. false: Core Thermal Sensor. [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stih418.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "stih418-clock.dtsi" 7 #include "stih407-family.dtsi" 8 #include "stih410-pinctrl.dtsi" 9 #include <dt-bindings/thermal/thermal.h> 12 #address-cells = <1>; 13 #size-cells = <0>; 14 cpu2: cpu@2 { 15 device_type = "cpu"; 16 compatible = "arm,cortex-a9"; [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5422-odroidhc1.dts | 1 // SPDX-License-Identifier: GPL-2.0 10 /dts-v1/; 11 #include <dt-bindings/leds/common.h> 12 #include "exynos5422-odroid-core.dtsi" 16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \ 19 led-controller { 20 compatible = "pwm-leds"; 22 led-1 { 26 pwm-names = "pwm2"; 27 max-brightness = <255>; [all …]
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H A D | exynos4-cpu-thermal.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device tree sources for Exynos4 thermal zone 8 #include <dt-bindings/thermal/thermal.h> 11 thermal-zones { 12 cpu_thermal: cpu-thermal { 13 thermal-sensors = <&tmu>; 14 polling-delay-passive = <0>; 15 polling-delay = <0>; 17 cpu_alert0: cpu-alert-0 { 22 cpu_alert1: cpu-alert-1 { [all …]
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H A D | exynos5422-odroidxu3-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source 12 #include <dt-bindings/input/input.h> 13 #include "exynos5422-odroid-core.dtsi" 20 gpio-keys { 21 compatible = "gpio-keys"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&power_key>; 25 power-key { 36 debounce-interval = <0>; [all …]
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/linux/Documentation/devicetree/bindings/arm/marvell/ |
H A D | ap80x-system-controller.txt | 6 registers giving access to numerous features: clocks, pin-muxing and 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the AP80x system controller 18 ------- 24 - 0: reference clock of CPU cluster 0 25 - 1: reference clock of CPU cluster 1 26 - 2: fixed PLL at 1200 Mhz 27 - 3: MSS clock, derived from the fixed PLL 31 - compatible: must be one of: 32 * "marvell,ap806-clock" [all …]
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/linux/Documentation/hwmon/ |
H A D | peci-cputemp.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 3 Kernel driver peci-cputemp 9 Intel Xeon E5-14xx v3 family 10 Intel Xeon E5-24xx v3 family 11 Intel Xeon E5-16xx v3 family 12 Intel Xeon E5-26xx v3 family 13 Intel Xeon E5-46xx v3 family 14 Intel Xeon E7-48xx v3 family 15 Intel Xeon E7-88xx v3 family 17 Intel Xeon E5-16xx v4 family [all …]
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/linux/drivers/thermal/ |
H A D | cpuidle_cooling.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/cpu.h> 18 #include <linux/thermal.h> 21 * struct cpuidle_cooling_device - data for the idle cooling device 31 * cpuidle_cooling_runtime - Running time computation 32 * @idle_duration_us: CPU idle time to inject in microseconds 43 * running = idle x ((100 / ratio) - 1) 47 * running = (idle x 100) / ratio - idle 60 return ((idle_duration_us * 100) / state) - idle_duration_us; in cpuidle_cooling_runtime() 64 * cpuidle_cooling_get_max_state - Get the maximum state [all …]
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/linux/arch/powerpc/kernel/ |
H A D | tau_6xx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * temp.c Thermal management for cpu's with Thermal Assist Units 8 * dynamic power management to limit peak CPU temp (using ICTC) 11 * Silly, crazy ideas: use cpu load (from scheduler) and ICTC to extend battery 55 static void set_thresholds(unsigned long cpu) in set_thresholds() argument 60 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | maybe_tie | THRM1_TID); in set_thresholds() 63 mtspr(SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | maybe_tie); in set_thresholds() 66 static void TAUupdate(int cpu) in TAUupdate() argument 77 if (tau[cpu].low >= step_size) { in TAUupdate() 78 tau[cpu].low -= step_size; in TAUupdate() [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/pads-imx8qm.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
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/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 #include <arm/allwinner/sunxi-h3-h5.dtsi> 6 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <0>; 13 cpu0: cpu@0 { 14 compatible = "arm,cortex-a53"; 15 device_type = "cpu"; 17 enable-method = "psci"; 19 clock-latency-ns = <244144>; /* 8 32k periods */ [all …]
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/linux/Documentation/admin-guide/thermal/ |
H A D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com> 7 - Jacob Pan <jacob.jun.pan@linux.intel.com> 12 - Goals and Objectives 15 - Idle Injection 16 - Calibration 19 - Effectiveness and Limitations 20 - Power vs Performance 21 - Scalability 22 - Calibration 23 - Comparison with Alternative Techniques [all …]
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/linux/Documentation/arch/x86/ |
H A D | intel-hfi.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Hardware-Feedback Interface for scheduling on Intel Hardware 8 -------- 11 IA-32 Architectures Software Developer's Manual (Intel SDM) Volume 3 Section 15 capability data for each CPU in the system. Linux can use the information from 19 ------------------------------- 22 about the performance and energy efficiency of each CPU in the system. Each 23 capability is given as a unit-less quantity in the range [0-255]. Higher values 33 mechanism may be used to lower Thermal Design Power. Such change can be 44 -------------------------------- [all …]
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/linux/arch/arm64/boot/dts/broadcom/stingray/ |
H A D | stingray.dtsi | 4 * Copyright(c) 2015-2017 Broadcom. All rights reserved. 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 interrupt-parent = <&gic>; 38 #address-cells = <2>; 39 #size-cells = <2>; 42 #address-cells = <2>; 43 #size-cells = <0>; 45 cpu@0 { 46 device_type = "cpu"; 47 compatible = "arm,cortex-a72"; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap3-cpu-thermal.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP3 SoC CPU thermal 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/thermal/thermal.h> 10 cpu_thermal: cpu-thermal { 11 polling-delay-passive = <250>; /* milliseconds */ 12 polling-delay = <1000>; /* milliseconds */ 15 thermal-sensors = <&bandgap>; 30 cpu_cooling_maps: cooling-maps { 33 cooling-device = [all …]
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/linux/drivers/platform/x86/ |
H A D | intel_ips.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2009-2010 Intel Corporation 10 * Some Intel Ibex Peak based platforms support so-called "intelligent 11 * power sharing", which allows the CPU and GPU to cooperate to maximize 12 * performance within a given TDP (thermal design point). This driver 13 * performs the coordination between the CPU and GPU, monitors thermal and 16 * primary purpose is to safely allow CPU and GPU turbo modes to be enabled 17 * by tracking power and thermal budget; secondarily it can boost turbo 18 * performance by allocating more power or thermal budget to the CPU or GPU 22 * thermal headroom is available, the CPU and/or GPU power clamps may be [all …]
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