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/linux/tools/perf/tests/
H A Dtopology.c1 // SPDX-License-Identifier: GPL-2.0
14 #define TEMPL "/tmp/perf-test-XXXXXX"
26 return -1; in get_temp()
44 session->evlist = evlist__new_default(); in session_write_header()
45 TEST_ASSERT_VAL("can't get evlist", session->evlist); in session_write_header()
47 perf_header__set_feat(&session->header, HEADER_CPU_TOPOLOGY); in session_write_header()
48 perf_header__set_feat(&session->heade in session_write_header()
116 struct perf_cpu cpu = { .cpu = i }; check_cpu_topology() local
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/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
8 collection of features that give more granular control over CPU performance.
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
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H A Dintel_idle.rst1 .. SPDX-License-Identifier: GPL-2.0
5 ``intel_idle`` CPU Idle Time Management Driver
17 :doc:`CPU idle time management subsystem <cpuidle>` in the Linux kernel
18 (``CPUIdle``). It is the default CPU idle time management driver for the
24 Documentation/admin-guide/pm/cpuidle.rst if you have not done that yet.]
27 logical CPU executing it is idle and so it may be possible to put some of the
28 processor's functional blocks into low-power states. That instruction takes two
29 arguments (passed in the ``EAX`` and ``ECX`` registers of the target CPU), the
38 only way to pass early-configuration-time parameters to it is via the kernel
45 ``/sys/devices/system/cpu/cpuidle/``:
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/linux/tools/perf/util/
H A Dbpf_counter_cgroup.c1 // SPDX-License-Identifier: GPL-2.0
42 #define FD(evt, cpu) (*(int *)xyarray__entry(evt->core.fd, cpu, 0)) argument
50 struct perf_cpu cpu; in bperf_load_program() local
51 int total_cpus = cpu__max_cpu().cpu; in bperf_load_program()
58 return -1; in bperf_load_program()
61 skel->rodata->num_cpus = total_cpus; in bperf_load_program()
62 skel->rodata->num_events = evlist->core.nr_entries / nr_cgroups; in bperf_load_program()
65 skel->rodata->use_cgroup_v2 = 1; in bperf_load_program()
67 BUG_ON(evlist->core.nr_entries % nr_cgroups != 0); in bperf_load_program()
69 /* we need one copy of events per cpu for reading */ in bperf_load_program()
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H A Dmmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2017, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
5 * Parts came from evlist.c builtin-{top,stat,record}.c, see those files for further
34 len = bitmap_scnprintf(mask->bits, mask->nbits, buf, MASK_SIZE); in mmap_cpu_mask__scnprintf()
36 pr_debug("%p: %s mask[%zd]: %s\n", mask, tag, mask->nbits, buf); in mmap_cpu_mask__scnprintf()
41 return perf_mmap__mmap_len(&map->cor in mmap__mmap_len()
97 perf_mmap__aio_bind(struct mmap * map,int idx,struct perf_cpu cpu,int affinity) perf_mmap__aio_bind() argument
246 struct perf_cpu cpu; build_node_mask() local
276 mmap__mmap(struct mmap * map,struct mmap_params * mp,int fd,struct perf_cpu cpu) mmap__mmap() argument
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H A Dcpumap.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /** Identify where counts are aggregated, -1 implies not to aggregate. */
17 * /sys/devices/system/cpu/cpuX/topology/physical_package_id.
20 /** The die id as read from /sys/devices/system/cpu/cpuX/topology/die_id. */
22 /** The cluster id as read from /sys/devices/system/cpu/cpuX/topology/cluster_id */
24 /** The cache level as read from /sys/devices/system/cpu/cpuX/cache/indexY/level */
27 * The cache instance ID, which is the first CPU in the
28 * /sys/devices/system/cpu/cpu
33 int core; global() member
35 struct perf_cpu cpu; global() member
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H A Dperf_api_probe.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 #include "perf-sys.h"
7 #include "util/parse-events.h"
14 static int perf_do_probe_api(setup_probe_fn_t fn, struct perf_cpu cpu, const char *str) in perf_do_probe_api() argument
19 int err = -EAGAIN, fd; in perf_do_probe_api()
20 static pid_t pid = -1; in perf_do_probe_api()
24 return -ENOMEM; in perf_do_probe_api()
32 fd = sys_perf_event_open(&evsel->core.attr, pid, cpu.cpu, -1, flags); in perf_do_probe_api()
34 if (pid == -1 && errno == EACCES) { in perf_do_probe_api()
46 fd = sys_perf_event_open(&evsel->core.attr, pid, cpu.cpu, -1, flags); in perf_do_probe_api()
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H A Dcpumap.c1 // SPDX-License-Identifier: GPL-2.0
22 * CPU number.
34 return (data->mask32_data.long_size == 4) in perf_record_cpu_map_data__test_bit()
35 ? (bit_word32 < data->mask32_data.nr) && in perf_record_cpu_map_data__test_bit()
36 (data->mask32_data.mask[bit_word32] & bit_mask32) != 0 in perf_record_cpu_map_data__test_bit()
37 : (bit_word64 < data->mask64_data.nr) && in perf_record_cpu_map_data__test_bit()
38 (data->mask64_data.mask[bit_word64] & bit_mask64) != 0; in perf_record_cpu_map_data__test_bit()
41 /* Read ith mask value from data into the given 64-bi
106 int cpu; cpu_map__from_mask() local
129 for (int cpu = data->range_cpu_data.start_cpu; cpu <= data->range_cpu_data.end_cpu; cpu_map__from_range() local
188 cpu__get_topology_int(int cpu,const char * name,int * value) cpu__get_topology_int() argument
198 cpu__get_socket_id(struct perf_cpu cpu) cpu__get_socket_id() argument
204 aggr_cpu_id__socket(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__socket() argument
240 struct perf_cpu cpu; cpu_aggr_map__new() local
282 cpu__get_die_id(struct perf_cpu cpu) cpu__get_die_id() argument
289 aggr_cpu_id__die(struct perf_cpu cpu,void * data) aggr_cpu_id__die() argument
312 cpu__get_cluster_id(struct perf_cpu cpu) cpu__get_cluster_id() argument
319 aggr_cpu_id__cluster(struct perf_cpu cpu,void * data) aggr_cpu_id__cluster() argument
336 cpu__get_core_id(struct perf_cpu cpu) cpu__get_core_id() argument
342 aggr_cpu_id__core(struct perf_cpu cpu,void * data) aggr_cpu_id__core() argument
345 int core = cpu__get_core_id(cpu); aggr_cpu_id__core() local
361 aggr_cpu_id__cpu(struct perf_cpu cpu,void * data) aggr_cpu_id__cpu() argument
375 aggr_cpu_id__node(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__node() argument
383 aggr_cpu_id__global(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__global() argument
518 cpu__get_node(struct perf_cpu cpu) cpu__get_node() argument
551 unsigned int cpu, mem; cpu__setup_cpunode_map() local
609 struct perf_cpu cpu = { .cpu = INT_MAX }; cpu_map__snprint() local
673 for (int cpu = last_cpu.cpu / 4 * 4; cpu >= 0; cpu -= 4) { cpu_map__snprint_mask() local
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/linux/arch/mips/kernel/
H A Dsmp-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/cpu.h>
19 #include <asm/mips-cps.h>
22 #include <asm/pm-cps.h>
26 #include <asm/smp-cps.h>
78 timeout--; in power_up_other_cluster()
89 static unsigned __init core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument
91 return min(smp_max_threads, mips_cps_numvps(cluster, core)); in core_vpe_count()
159 0x0, CSEGX_SIZE - 1); in allocate_cps_vecs()
172 end = SZ_4G - 1; in allocate_cps_vecs()
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/linux/arch/arm/mach-bcm/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2015 Broadcom Corporation
12 #include <linux/irqchip/irq-bcm2836.h>
34 #define OF_SECONDARY_BOOT "secondary-boot-reg"
54 return -ENXIO; in scu_a9_enable()
60 pr_err("hardware reports only one core\n"); in scu_a9_enable()
61 return -ENOENT; in scu_a9_enable()
68 return -ENOMEM; in scu_a9_enable()
78 static u32 secondary_boot_addr_for(unsigned int cpu) in secondary_boot_addr_for() argument
81 struct device_node *cpu_node = of_get_cpu_node(cpu, NULL); in secondary_boot_addr_for()
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/linux/arch/powerpc/include/asm/
H A Dcputhreads.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * threads per core and the same number for each core in the system
15 * as the CPU numbers are still allocated, just not brought online).
41 int cpu_core_index_of_thread(int cpu);
42 int cpu_first_thread_of_core(int core);
44 static inline int cpu_core_index_of_thread(int cpu) { return cpu; } in cpu_core_index_of_thread() argument
45 static inline int cpu_first_thread_of_core(int core) { return core; } in cpu_first_thread_of_core() argument
48 static inline int cpu_thread_in_core(int cpu) in cpu_thread_in_core() argument
50 return cpu & (threads_per_core - 1); in cpu_thread_in_core()
53 static inline int cpu_thread_in_subcore(int cpu) in cpu_thread_in_subcore() argument
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/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A Duncore-io.json228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
239 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
251 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
263 "BriefDescription": "Data requested by the CPU
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/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt4 NVIDIA Tegra SoC's have a mandatory voltage-coupling between regulators.
9 ------------------------
11 On Tegra20 SoC's there are 3 coupled regulators: CORE, RTC and CPU.
12 The CORE and RTC voltages shall be in a range of 170mV from each other
13 and they both shall be higher than the CPU voltage by at least 120mV.
16 ------------------------
18 On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE
19 and CPU voltages shall be in a range of 300mV from each other and CORE
20 voltage shall be higher than the CPU by N mV, where N depends on the CPU
24 - nvidia,tegra-core-regulator: Boolean property that designates regulator
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/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A Duncore-io.json228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
240 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
252 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
264 "BriefDescription": "Data requested by the CPU
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/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Duncore-io.json228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
240 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
252 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
264 "BriefDescription": "Data requested by the CPU
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/linux/arch/mips/loongson64/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/cpu.h>
37 static u32 (*ipi_read_clear)(int cpu);
38 static void (*ipi_write_action)(int cpu, u32 action);
39 static void (*ipi_write_enable)(int cpu);
40 static void (*ipi_clear_buf)(int cpu);
41 static void (*ipi_write_buf)(int cpu, struct task_struct *idle);
43 /* send mail via Mail_Send register for 3A4000+ CPU */
44 static void csr_mail_send(uint64_t data, int cpu, int mailbox) in csr_mail_send() argument
51 val |= (cpu << CSR_MAIL_SEND_CPU_SHIFT); in csr_mail_send()
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/linux/drivers/watchdog/
H A Docteon-wdt-main.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2007-2017 Cavium, Inc.
11 * (c) Copyright 1996-1997 Alan Cox <alan@lxorguk.ukuu.org.uk>,
16 * "AS-IS" and at no charge.
39 * A watchdog is maintained for each CPU in the system, that way if
40 * one CPU suffers a lockup, we also get a register dump and reset.
55 #include <linux/cpu.h>
63 #include <asm/octeon/cvmx-boot-vector.h>
64 #include <asm/octeon/cvmx-ciu2-defs.h>
65 #include <asm/octeon/cvmx-rst-defs.h>
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/linux/arch/powerpc/perf/
H A Dimc-pmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * In-Memory Collection (IMC) Performance Monitor counter support.
13 #include <asm/imc-pmu.h>
22 * Used to avoid races in counting the nest-pmu units during hotplug
32 /* Core IMC data structures and variables */
51 * core and trace-imc
61 return container_of(event->pmu, struct imc_pmu, pmu); in imc_event_to_pmu()
64 PMU_FORMAT_ATTR(event, "config:0-61");
65 PMU_FORMAT_ATTR(offset, "config:0-31");
67 PMU_FORMAT_ATTR(mode, "config:33-40");
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/linux/drivers/cpuidle/
H A Dcpuidle-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <asm/pm-cps.h>
17 STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
18 STATE_CLOCK_GATED, /* Core clock gated */
19 STATE_POWER_GATED, /* Core power gated */
30 * At least one core must remain powered up & clocked in order for the in cps_nc_enter()
33 * TODO: don't treat core 0 specially, just prevent the final core in cps_nc_enter()
36 if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT)) in cps_nc_enter()
52 return -EINVAL; in cps_nc_enter()
55 /* Notify listeners the CPU is about to power down */ in cps_nc_enter()
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/linux/drivers/base/
H A Darch_topology.c1 // SPDX-License-Identifier: GPL-2.0
3 * Arch specific cpu topology information
12 #include <linux/cpu.h>
67 int cpu; in topology_set_scale_freq_source() local
78 for_each_cpu(cpu, cpus) { in topology_set_scale_freq_source()
79 sfd = rcu_dereference(*per_cpu_ptr(&sft_data, cpu)); in topology_set_scale_freq_source()
82 if (!sfd || sfd->source != SCALE_FREQ_SOURCE_ARCH) { in topology_set_scale_freq_source()
83 rcu_assign_pointer(per_cpu(sft_data, cpu), data); in topology_set_scale_freq_source()
84 cpumask_set_cpu(cpu, &scale_freq_counters_mask); in topology_set_scale_freq_source()
98 int cpu; in topology_clear_scale_freq_source() local
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/linux/tools/power/x86/turbostat/
H A Dturbostat.83 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv…
29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri…
36 …On Intel hybrid platforms, instead of one "cpu" perf device there are two, "cpu_core" and "cpu_ato…
37 …Turbostat, in this case, allow user to use "cpu" device and will automatically detect the type of …
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/linux/drivers/edac/
H A Docteon_edac-pc.c9 * written by Ralf Baechle <ralf@linux-mips.org>
34 * EDAC CPU cache error callback
36 * @event: non-zero if unrecoverable.
44 unsigned int core = cvmx_get_core_num(); in co_cache_error_event() local
45 unsigned int cpu = smp_processor_id(); in co_cache_error_event() local
50 dcache_err = cache_err_dcache[core]; in co_cache_error_event()
51 cache_err_dcache[core] = 0; in co_cache_error_event()
57 edac_device_printk(p->ed, KERN_ERR, in co_cache_error_event()
58 "CacheErr (Icache):%llx, core %d/cpu %d, cp0_errorepc == %lx\n", in co_cache_error_event()
59 (unsigned long long)icache_err, core, cpu, in co_cache_error_event()
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/linux/tools/perf/arch/arm/util/
H A Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/coresight-pmu.h>
18 #include "cs-etm.h"
29 #include "../../../util/cs-etm.h"
71 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu);
72 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val);
73 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path);
76 struct perf_cpu cpu) in cs_etm_get_version() argument
78 if (cs_etm_is_ete(cs_etm_pmu, cpu)) in cs_etm_get_version()
80 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0])) in cs_etm_get_version()
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/linux/arch/powerpc/platforms/powernv/
H A Dsubcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/cpu.h>
32 * A core can be in one of three states, unsplit, 2-way split, and 4-way split.
37 * ------------|------------------
39 * 2-way split | 2
40 * 4-way split | 4
42 * The core is split along thread boundaries, the mapping between subcores and
46 * ----------------------------
48 * ----------------------------
50 * ----------------------------
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/linux/drivers/macintosh/
H A Dwindfarm_smu_sat.c1 // SPDX-License-Identifier: GPL-2.0-only
60 /* TODO: Add the resulting partition to the device-tree */ in smu_sat_get_sdb_partition()
65 err = i2c_smbus_write_word_data(sat->i2c, 8, id << 8); in smu_sat_get_sdb_partition()
71 err = i2c_smbus_read_word_data(sat->i2c, 9); in smu_sat_get_sdb_partition()
89 err = i2c_smbus_read_i2c_block_data(sat->i2c, 0xa, 4, data); in smu_sat_get_sdb_partition()
119 err = i2c_smbus_read_i2c_block_data(sat->i2c, 0x3f, 16, sat->cache); in wf_sat_read_cache()
122 sat->last_read = jiffies; in wf_sat_read_cache()
129 16, 1, sat->cache, 16, false); in wf_sat_read_cache()
138 struct wf_sat *sat = sens->sat; in wf_sat_sensor_get()
142 if (sat->i2c == NULL) in wf_sat_sensor_get()
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