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Searched full:counter1 (Results 1 – 10 of 10) sorted by relevance

/linux/tools/testing/selftests/vDSO/
H A Dvdso_test_chacha.c86 uint32_t key[8], counter1[2], counter2[2]; in main() local
97 memset(counter1, 0, sizeof(counter1)); in main()
98 reference_chacha20_blocks(output1, key, counter1, BLOCKS); in main()
107 if (memcmp(counter1, counter2, sizeof(counter1))) in main()
111 memset(counter1, 0, sizeof(counter1)); in main()
112 counter1[0] = (uint32_t)-BLOCKS + 2; in main()
116 reference_chacha20_blocks(output1, key, counter1, BLOCKS); in main()
120 if (memcmp(counter1, counter2, sizeof(counter1))) in main()
123 reference_chacha20_blocks(output1, key, counter1, BLOCKS); in main()
127 if (memcmp(counter1, counter2, sizeof(counter1))) in main()
/linux/drivers/gpu/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h81 #define DCN_1_0__SRCID__DCCG_PERFCOUNTER_INT1_STATUS 2 // DCCG perfmon counter1 interrupt DCCG_PERF…
87 #define DCN_1_0__SRCID__DMU_PERFCOUNTER_INT1_STATUS 3 // DMU perfmon counter1 interrupt DMU_PERFMON…
93 #define DCN_1_0__SRCID__DIO_PERFCOUNTER_INT1_STATUS 4 // DIO perfmon counter1 interrupt DIO_PERFMON…
126 #define DCN_1_0__SRCID__WB0_PERFCOUNTER_INT1_STATUS 6 // WB0 perfmon counter1 interrupt WB0_PERFMON…
375 #define DCN_1_0__SRCID__DCCG_PERFCOUNTER2_INT1_STATUS 0x11 // DCCG perfmon2 counter1 interrupt DCCG…
811 #define DCN_1_0__SRCID__DPP0_PERFCOUNTER_INT1_STATUS 0x24 // DPP0 perfmon counter1 interrupt DPP0_P…
835 #define DCN_1_0__SRCID__DPP1_PERFCOUNTER_INT1_STATUS 0x25 // DPP1 perfmon counter1 interrupt DPP1_P…
859 #define DCN_1_0__SRCID__DPP2_PERFCOUNTER_INT1_STATUS 0x26 // DPP2 perfmon counter1 interrupt DPP2_P…
883 #define DCN_1_0__SRCID__DPP3_PERFCOUNTER_INT1_STATUS 0x27 // DPP3 perfmon counter1 interrupt DPP3_P…
889 #define DCN_1_0__SRCID__DPP4_PERFCOUNTER_INT1_STATUS 0x28 // DPP4 perfmon counter1 interrupt DPP4_P…
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/linux/arch/powerpc/kernel/vdso/
H A Dvgetrandom-chacha.S33 #define counter1 r15 macro
175 lwz counter1, 4(counter)
177 rldimi counter0, counter1, 32, 0
216 mr state13, counter1
246 add state13, state13, counter1
296 srdi counter1, counter0, 32
299 addze counter1, counter1
310 stw counter1, 4(counter)
/linux/arch/mips/alchemy/common/
H A Dtime.c16 * Clocksource/event using the 32.768kHz-clocked Counter1 ('RTC' in the
41 .name = "alchemy-counter1",
116 /* register counter1 clocksource and event device */ in alchemy_time_init()
/linux/drivers/watchdog/
H A Dni903x_wdt.c83 u8 control, counter0, counter1, counter2; in ni903x_wdd_get_timeleft() local
91 counter1 = inb(wdt->io_base + NIWD_COUNTER1); in ni903x_wdd_get_timeleft()
94 counter = (counter2 << 16) | (counter1 << 8) | counter0; in ni903x_wdd_get_timeleft()
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_mips.h221 /* Icache misses in COUNTER1. */
226 /* Dcache misses in COUNTER1. */
231 /* JTLB instruction accesses misses in COUNTER1. */
236 /* JTLB data misses in COUNTER1. */
/linux/drivers/comedi/drivers/
H A Dcomedi_8254.c343 * @counter1: the counter number for the first divisor
348 unsigned int counter1, in comedi_8254_pacer_enable() argument
354 if (counter1 > 2 || counter2 > 2 || counter1 == counter2) in comedi_8254_pacer_enable()
362 comedi_8254_set_mode(i8254, counter1, mode); in comedi_8254_pacer_enable()
372 comedi_8254_write(i8254, counter1, i8254->divisor1); in comedi_8254_pacer_enable()
/linux/arch/arm/mm/
H A Dcache-l2x0-pmu.c30 * The L220/PL310 PMU has two equivalent counters, Counter1 and Counter0.
32 * the register for Counter1 comes first, followed by the register for
34 * We ensure that idx 0 -> Counter0, and idx1 -> Counter1.
/linux/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml86 followed by counter0 overflow interrupt, counter1 overflow
/linux/drivers/perf/
H A Dfsl_imx9_ddr_perf.c236 /* counter1 specific events */