| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_gen4_ras.h | 10 /* ERRSOU0 Correctable error mask*/
13 /* HI AE Correctable error log */
16 /* HI AE Correctable error log enable */
270 * BIT(0) - Indicates one correctable error
298 * BIT(1) - Shared memory correctable interrupt mask
301 * BIT(4) - SSM interrupt generated by SER correctable error mask
436 * Correctable error mask in SER_ERR_SSMSH
437 * BIT(1) - Indicates a correctable Error has occurred
439 * BIT(6) - Indicates a correctable Error has occurred in
441 * BIT(11) - Indicates an correctable Error has occurred in
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| H A D | adf_gen4_ras.c | 12 /* Enable correctable error reporting in ERRSOU0 */ in enable_errsou_reporting()
39 /* Disable correctable error reporting in ERRSOU0 */ in disable_errsou_reporting()
59 /* Enable Acceleration Engine correctable error reporting */ in enable_ae_error_reporting()
68 /* Disable Acceleration Engine correctable error reporting */ in disable_ae_error_reporting()
358 "Correctable error detected in AE: 0x%x\n", in adf_gen4_process_errsou0()
631 "Correctable error on ssm shared memory: 0x%x\n", in adf_handle_cerrssmsh()
1145 "Correctable SER_SSMSH_ERR: 0x%x\n", reg); in adf_handle_ser_err_ssmsh()
1220 "Correctable error exception in SSM XLT: 0x%x", reg); in adf_handle_exprpssmxlt()
1252 "Correctable error exception in SSM DCMP: 0x%x", reg); in adf_handle_exprpssmdcpr()
1397 "ARAM correctable error : 0x%x\n", aram_cerr); in adf_handle_aramcerr()
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| /linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac5.c | 34 "correctable" : "uncorrectable", module_name, in dwmac5_log_error()
78 void __iomem *ioaddr, bool correctable, in dwmac5_handle_mac_err() argument
86 dwmac5_log_error(ndev, value, correctable, "MAC", dwmac5_mac_errors, in dwmac5_handle_mac_err()
126 void __iomem *ioaddr, bool correctable, in dwmac5_handle_mtl_err() argument
134 dwmac5_log_error(ndev, value, correctable, "MTL", dwmac5_mtl_errors, in dwmac5_handle_mtl_err()
174 void __iomem *ioaddr, bool correctable, in dwmac5_handle_dma_err() argument
182 dwmac5_log_error(ndev, value, correctable, "DMA", dwmac5_dma_errors, in dwmac5_handle_dma_err()
225 value |= RPCEIE; /* RX Parser Memory Correctable Error */ in dwmac5_safety_feat_config()
226 value |= ECEIE; /* EST Memory Correctable Error */ in dwmac5_safety_feat_config()
227 value |= RXCEIE; /* RX Memory Correctable Error */ in dwmac5_safety_feat_config()
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| H A D | dwxgmac2_core.c | 711 "correctable" : "uncorrectable", module_name, in dwxgmac3_log_error()
755 void __iomem *ioaddr, bool correctable, in dwxgmac3_handle_mac_err() argument
763 dwxgmac3_log_error(ndev, value, correctable, "MAC", in dwxgmac3_handle_mac_err()
803 void __iomem *ioaddr, bool correctable, in dwxgmac3_handle_mtl_err() argument
811 dwxgmac3_log_error(ndev, value, correctable, "MTL", in dwxgmac3_handle_mtl_err()
888 void __iomem *ioaddr, bool correctable, in dwxgmac3_handle_dma_err() argument
896 dwxgmac3_log_error(ndev, value, correctable, "DMA", in dwxgmac3_handle_dma_err()
921 value |= XGMAC_RPCEIE; /* RX Parser Memory Correctable Error */ in dwxgmac3_safety_feat_config()
922 value |= XGMAC_ECEIE; /* EST Memory Correctable Error */ in dwxgmac3_safety_feat_config()
923 value |= XGMAC_RXCEIE; /* RX Memory Correctable Error */ in dwxgmac3_safety_feat_config()
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| /linux/arch/x86/ras/ |
| H A D | Kconfig | 3 bool "Correctable Errors Collector"
6 This is a small cache which collects correctable memory errors per 4K
20 Add extra files to (debugfs)/ras/cec to test the correctable error
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| /linux/Documentation/firmware-guide/acpi/apei/ |
| H A D | einj.rst | 50 0x00000001 Processor Correctable
53 0x00000008 Memory Correctable
56 0x00000040 PCI Express Correctable
59 0x00000200 Platform Correctable
190 0x00000008 Memory Correctable
194 # echo 0x8 > error_type # Choose correctable memory error
212 0x00008000 CXL.mem Protocol Correctable
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| /linux/drivers/edac/ |
| H A D | zynqmp_edac.c | 31 /* Correctable error info registers */
86 * @ce_cnt: Correctable error count
88 * @ceinfo: Correctable error log information
103 * @ce_cnt: Correctable Error count
106 * @ce_bitpos: Bit position for Correctable Error
155 * Handles correctable and uncorrectable errors.
244 * To get the Correctable Error injected, the following steps are needed:
247 * - Write the Correctable Error bit position value:
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| H A D | xgene_edac.c | 206 /* Detect correctable memory error */ in xgene_edac_mc_check()
215 "MCU correctable error at rank %d bank %d column %d row %d count %d\n", in xgene_edac_mc_check()
538 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
540 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
578 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
580 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
623 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
625 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
687 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l2_check()
689 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l2_check()
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| H A D | i5400_edac.c | 160 EMASK_M17 = 1<<16, /* Correctable Non-Mirrored Demand Data ECC */
162 EMASK_M19 = 1<<18, /* Correctable Resilver- or Spare-Copy Data ECC */
163 EMASK_M20 = 1<<19, /* Correctable Patrol Data ECC */
170 EMASK_M27 = 1<<26, /* Correctable Counter Threshold Exceeded */
195 [16] = "Correctable Non-Mirrored Demand Data ECC",
197 [18] = "Correctable Resilver- or Spare-Copy Data ECC",
198 [19] = "Correctable Patrol Data ECC",
205 [26] = "Correctable Counter Threshold Exceeded",
215 /* Correctable errors */
602 /* Correctable errors */ in i5400_process_nonfatal_error_info()
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| H A D | synopsys_edac.c | 68 /* ECC correctable/uncorrectable error log register definitions */
73 /* ECC correctable/uncorrectable error address register definitions */
289 * @ce_cnt: Correctable error count.
291 * @ceinfo: Correctable error log information.
308 * @ce_cnt: Correctable Error count.
496 * handle_error - Handle Correctable and Uncorrectable errors.
500 * Handles ECC correctable and uncorrectable errors.
1099 ? ("Correctable Error") : ("UnCorrectable Error")); in inject_data_poison_show()
1448 * Start capturing the correctable and uncorrectable errors. A write of in mc_probe()
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| H A D | versal_edac.c | 196 * @ceinfo: Correctable error log information.
214 * @ce_cnt: Correctable error count.
408 * handle_error - Handle Correctable and Uncorrectable errors.
412 * Handles ECC correctable and uncorrectable errors.
449 * err_callback - Handle Correctable and Uncorrectable errors.
453 * Handles ECC correctable and uncorrectable errors.
764 * To inject a correctable error, the following steps are needed:
766 * - Write the correctable error bit position value:
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| H A D | e7xxx_edac.c | 103 #define E7XXX_DRAM_CELOG_ADD 0xA0 /* DRAM first correctable memory */
117 #define E7XXX_DRAM_CELOG_SYNDROME 0xD0 /* DRAM first correctable memory */
293 if (info->dram_ferr & 1) { /* check first error correctable */ in e7xxx_process_error_info()
307 if (info->dram_nerr & 1) { /* check next error correctable */ in e7xxx_process_error_info()
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| /linux/arch/sparc/kernel/ |
| H A D | spiterrs.S | 107 /* This is the trap handler entry point for ECC correctable
117 * only for correctable errors during memory read accesses by
126 * specifically handles correctable errors. If an
130 * correctable, and the error logging C code will notice this
142 /* Ok, in this case we only have a correctable error.
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| /linux/arch/sparc/include/asm/ |
| H A D | chafsr.h | 38 /* SW handled correctable E-cache Tag ECC error */
56 * an uncorrectable error or a SW correctable error occurs and the status
61 * status bit occur, only uncorrectable and SW correctable ones have
120 /* SW Correctable E-cache ECC error for instruction fetch or data access
157 /* Correctable ECC error from remote cache/memory */
166 /* Foreign read to DRAM incurring correctable ECC error */
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| H A D | sfafsr.h | 71 #define ESTATE_ERR_CE 0x1 /* Correctable errors */
81 #define TRAP_TYPE_CEE 0x63 /* Correctable ECC Error */
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| H A D | ecc.h | 46 * EINT: Enable Interrupts for correctable errors. 0=off 1=on
111 * C: Correctable error? 0=no 1=yes
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/ |
| H A D | other.json | 21 …riefDescription": "L1 Data Cache (data, tag or dirty) memory error, correctable or non-correctable"
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| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-cxl | 50 0x1000 CXL.cache Protocol Correctable
53 0x8000 CXL.mem Protocol Correctable
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| /linux/drivers/acpi/apei/ |
| H A D | einj-cxl.c | 20 { ACPI_EINJ_CXL_CACHE_CORRECTABLE, "CXL.cache Protocol Correctable" },
23 { ACPI_EINJ_CXL_MEM_CORRECTABLE, "CXL.mem Protocol Correctable" },
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| /linux/drivers/mtd/nand/raw/ |
| H A D | omap_elm.c | 272 * elm_error_correction - locate correctable error position
277 * register updated with correctable/uncorrectable error information.
278 * In case of correctable errors, number of errors located from
296 /* Check correctable error or not */ in elm_error_correction()
301 /* Read count of correctable errors */ in elm_error_correction()
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| H A D | r852.h | 98 #define R852_ECC_CORRECTABLE 0x20 /* correctable error exist */
99 #define R852_ECC_FAIL 0x40 /* non correctable error detected */
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| /linux/drivers/ras/ |
| H A D | cec.c | 16 * RAS Correctable Errors Collector
18 * This is a simple gadget which collects correctable errors and counts their
108 * The number of correctable errors
542 /* We eat only correctable DRAM errors with usable addresses. */ in cec_notifier()
589 pr_info("Correctable Errors collector initialized.\n"); in cec_init()
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| /linux/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| H A D | memory.json | 21 …"PublicDescription": "This event counts any correctable or uncorrectable memory error (ECC or pari…
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| /linux/arch/mips/pci/ |
| H A D | pci-octeon.c | 118 config = PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */ in pcibios_plat_dev_init()
138 * correctable, not if the error is reported. in pcibios_plat_dev_init()
141 /* Clear Correctable Error Status */ in pcibios_plat_dev_init()
144 /* Enable reporting of all correctable errors */ in pcibios_plat_dev_init()
145 /* Correctable Error Mask - turned on bits disable errors */ in pcibios_plat_dev_init()
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a76/ |
| H A D | exception.json | 6 …"PublicDescription": "This event counts any correctable or uncorrectable memory error (ECC or pari…
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