cores (full) in projects: linux - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched full:cores (Results 1 – 25 of 696) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...28

/linux/Documentation/admin-guide/
H A D	lockup-watchdogs.rst	67 By default, the watchdog runs on all online cores. However, on a 69 on the housekeeping cores, not the cores specified in the "nohz_full" 71 the "nohz_full" cores, we would have to run timer ticks to activate 73 from protecting the user code on those cores from the kernel. 74 Of course, disabling it by default on the nohz_full cores means that 75 when those cores do enter the kernel, by default we will not be 77 to continue to run on the housekeeping (non-tickless) cores means 78 that we will continue to detect lockups properly on those cores. 80 In either case, the set of cores excluded from running the watchdog 82 nohz_full cores, this may be useful for debugging a case where the [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	uncore-power.json	178 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 187 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 196 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 205 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 214 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 223 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 232 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 241 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 250 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 259 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	uncore-power.json	178 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 187 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 196 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 205 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 214 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 223 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 232 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 241 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 250 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 259 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", [all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	uncore-power.json	88 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 97 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 106 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 115 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 124 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 133 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 142 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 151 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 232 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 262 "BriefDescription": "Number of cores in C0", [all …]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	uncore-power.json	178 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 187 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 196 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 205 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 214 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 223 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 232 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 241 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 250 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 259 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", [all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	cache.json	407 …clusive, hits to the L3 may require snooping the private L2 caches of any cores on the same socket… 417 …clusive, hits to the L3 may require snooping the private L2 caches of any cores on the same socket… 654 …efetch code reads that hit in the LLC and the snoop to one of the sibling cores hits the line in M… 664 …t needed as either the core-valid bit is not set or the shared line is present in multiple cores.", 674 … & prefetch code reads that hit in the LLC and the snoops sent to sibling cores return clean respo… 704 …efetch data reads that hit in the LLC and the snoop to one of the sibling cores hits the line in M… 714 …emand & prefetch data reads that hit in the LLC and the snoops to sibling cores hit in either E/S … 724 …t needed as either the core-valid bit is not set or the shared line is present in multiple cores.", 734 … & prefetch data reads that hit in the LLC and the snoops sent to sibling cores return clean respo… 754 …efetch code reads that hit in the LLC and the snoop to one of the sibling cores hits the line in M… [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	uncore-power.json	114 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 177 "BriefDescription": "Number of cores in C0", 183 …cores in C0 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 187 "BriefDescription": "Number of cores in C3", 193 …cores in C3 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 197 "BriefDescription": "Number of cores in C6", 203 …cores in C6 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 233 … Transition Cycles : Number of cycles spent performing core C state transitions across all cores.",
H A D	uncore-cache.json	59 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 70 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 81 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 92 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 103 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 114 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 125 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 136 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 147 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 158 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	uncore-power.json	114 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 177 "BriefDescription": "Number of cores in C0", 183 …cores in C0 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 187 "BriefDescription": "Number of cores in C3", 193 …cores in C3 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 197 "BriefDescription": "Number of cores in C6", 203 …cores in C6 : This is an occupancy event that tracks the number of cores that are in the chosen C-… 233 … Transition Cycles : Number of cycles spent performing core C state transitions across all cores.",
H A D	uncore-cache.json	59 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 70 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 81 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 92 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 103 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 114 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 125 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 136 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 147 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 158 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … [all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	uncore-power.json	112 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 185 "BriefDescription": "Number of cores in C-State : C0 and C1", 191 …cores in C-State : C0 and C1 : This is an occupancy event that tracks the number of cores that are… 196 "BriefDescription": "Number of cores in C-State : C3", 202 …cores in C-State : C3 : This is an occupancy event that tracks the number of cores that are in the… 207 "BriefDescription": "Number of cores in C-State : C6 and C7", 213 …cores in C-State : C6 and C7 : This is an occupancy event that tracks the number of cores that are… 244 … Transition Cycles : Number of cycles spent performing core C state transitions across all cores.",
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	uncore-power.json	286 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 295 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 304 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 313 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 322 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 331 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 340 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 349 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 358 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 367 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	uncore-power.json	113 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 186 "BriefDescription": "Number of cores in C-State : C0 and C1", 192 …cores in C-State : C0 and C1 : This is an occupancy event that tracks the number of cores that are… 197 "BriefDescription": "Number of cores in C-State : C3", 203 …cores in C-State : C3 : This is an occupancy event that tracks the number of cores that are in the… 208 "BriefDescription": "Number of cores in C-State : C6 and C7", 214 …cores in C-State : C6 and C7 : This is an occupancy event that tracks the number of cores that are… 245 … Transition Cycles : Number of cycles spent performing core C state transitions across all cores.",
H A D	uncore-cache.json	1113 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1124 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1135 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1146 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1157 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1168 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1179 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1190 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1201 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … 1212 …Cores are snooped if the transaction looks up the cache and determines that it is necessary based … [all …]
/linux/arch/mips/include/asm/octeon/
H A D	cvmx-coremask.h	`11 * Module to support operations on bitmap of cores. Coremask can be used to 12 * select a specific core, a group of cores, or all available cores, for 22 * Node 0: Cores 0 - 47 23 * Node 1: Cores 128 - 175 24 * Node 2: Cores 256 - 303 25 * Node 3: Cores 384 - 431`
/linux/Documentation/networking/device_drivers/can/freescale/
H A D	flexcan.rst	`13 For most flexcan IP cores the driver supports 2 RX modes: 18 The older flexcan cores (integrated into the i.MX25, i.MX28, i.MX35 28 cores come up in a mode where RTR reception is possible. 39 On some IP cores the controller cannot receive RTR frames in the 45 Waive ability to receive RTR frames. (not supported on all IP cores) 48 some IP cores RTR frames cannot be received anymore.`
/linux/drivers/phy/broadcom/
H A D	phy-bcm-sr-pcie.c	85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 / 87 / PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 / 89 / PIPEMUX = 5, RC 8x2, all 8 cores / 91 / PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 / 93 / PIPEMUX = 7, RC 1x4 + 6x2, cores 0, 2, 3, 4, 5, 6, 7 / 95 / PIPEMUX = 8, EP 1x8 + RC 4x2, cores 4, 5, 6, 7 / 97 / PIPEMUX = 9, EP 1x8 + RC 2x4, cores 6, 7 / 99 / PIPEMUX = 10, EP 2x4 + RC 2x4, cores 1, 6 / 101 / PIPEMUX = 11, EP 2x4 + RC 4x2, cores 2, 3, 4, 5 / 103 / PIPEMUX = 12, EP 1x4 + RC 6x2, cores 2, 3, 4, 5, 6, 7 */ [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	uncore-power.json	96 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 178 "BriefDescription": "Number of cores in C-State; C0 and C1", 184 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 189 "BriefDescription": "Number of cores in C-State; C3", 195 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 200 "BriefDescription": "Number of cores in C-State; C6 and C7", 206 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 237 …PublicDescription": "Number of cycles spent performing core C state transitions across all cores.",
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	uncore-power.json	96 …igh enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are id… 178 "BriefDescription": "Number of cores in C-State; C0 and C1", 184 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 189 "BriefDescription": "Number of cores in C-State; C3", 195 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 200 "BriefDescription": "Number of cores in C-State; C6 and C7", 206 … that tracks the number of cores that are in the chosen C-State. It can be used by itself to get … 237 …PublicDescription": "Number of cycles spent performing core C state transitions across all cores.",
/linux/Documentation/devicetree/bindings/arm/
H A D	arm,vexpress-juno.yaml	45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores 51 - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores 58 cores in a MPCore configuration in a test chip on the core tile. See 64 A15 CPU cores in a test chip on the core tile. This is the first test 71 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration 77 cores in a test chip on the core tile. See ARM DDI 0498D. 84 AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53 85 cores in a big.LITTLE configuration. It also features the MALI T624
/linux/arch/arm/boot/dts/arm/
H A D	vexpress-v2p-ca15-tc1.dts	`199 regulator-cores { 203 regulator-name = "Cores"; 207 label = "Cores"; 210 amp-cores { 211 /* Total current for the two cores */ 214 label = "Cores"; 224 power-cores { 228 label = "Cores"; 235 label = "Cores";`
/linux/Documentation/devicetree/bindings/media/xilinx/
H A D	video.txt	`1 DT bindings for Xilinx video IP cores 4 Xilinx video IP cores process video streams by acting as video sinks and/or 10 cores are represented as defined in ../video-interfaces.txt. 18 The following properties are common to all Xilinx video IP cores. 21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream`
/linux/arch/riscv/
H A D	Kconfig.errata	`9 here if your platform uses Andes CPU cores. 20 non-standard handling on non-coherent operations on Andes cores. 30 here if your platform uses SiFive CPU cores. 81 here if your platform uses T-HEAD CPU cores. 114 The T-Head C9xx cores implement a PMU overflow extension very 127 The T-Head C9xx cores have a vulnerability in the xtheadvector`
/linux/Documentation/devicetree/bindings/timer/
H A D	snps,arc-timer.yaml	`17 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically 18 TIMER0 used as clockevent provider (true for all ARC cores) 28 Use <16> for ARCHS cores, <3> for ARC700 cores.`
/linux/drivers/bcma/
H A D	main.c	92 list_for_each_entry(core, &bus->cores, list) { in bcma_find_core_unit() 272 INIT_LIST_HEAD(&bus->cores); in bcma_init_bus() 296 list_for_each_entry(core, &bus->cores, list) { in bcma_register_devices() 310 /* Early cores were already registered / in bcma_register_devices() 366 list_for_each_entry_safe(core, tmp, &bus->cores, list) { in bcma_unregister_cores() 375 / Now no one uses internally-handled cores, we can free them / in bcma_unregister_cores() 376 list_for_each_entry_safe(core, tmp, &bus->cores, list) { in bcma_unregister_cores() 387 / Scan for devices (cores) / in bcma_bus_register() 411 / Cores providing flash access go before SPROM init */ in bcma_bus_register() 412 list_for_each_entry(core, &bus->cores, list) { in bcma_bus_register() [all …]

12 3 4 5 6 7 8 9 10 >>...28