controller\-specific (full) in projects: freebsd

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Searched +full:controller +full:- +full:specific (Results 1 – 25 of 1024) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A D	samsung-sdhci.txt	`1 * Samsung's SDHCI Controller device tree bindings 3 Samsung's SDHCI controller is used as a connectivity interface with external 6 Samsung implementation of the SDHCI controller. 8 Required SoC Specific Properties: 9 - compatible: should be one of the following 10 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci 11 controller. 12 - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci 13 controller. 15 Required Board Specific Properties: [all …]`
H A D	exynos-dw-mshc.txt	1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile 2 Storage Host Controller 4 The Synopsys designware mobile storage host controller is used to interface 6 differences between the core Synopsys dw mshc controller properties described 7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific 8 extensions to the Synopsys Designware Mobile Storage Host Controller. 13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 14 specific extensions. 15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 16 specific extensions. [all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A D	spi-samsung.txt	1 * Samsung SPI Controller 3 The Samsung SPI controller is used to interface with various devices such as flash 6 Required SoC Specific Properties: 8 - compatible: should be one of the following. 9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms 10 - samsung,s3c6410-spi: for s3c6410 platforms 11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms 12 - samsung,exynos5433-spi: for exynos5433 compatible controllers 13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED> 15 - reg: physical base address of the controller and length of memory mapped [all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A D	snps,dw-pcie-ep.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 14 Synopsys DesignWare PCIe host controller endpoint 16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie-ep [all …]`
H A D	snps,dw-pcie-common.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pci [all...]`
H A D	snps,dw-pcie.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 14 Synopsys DesignWare PCIe host controller 16 # Please create a separate DT-schema for your DWC PCIe Root Port controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie [all …]`
/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A D	mpic.txt	`2 Freescale MPIC Interrupt Controller Node 6 The Freescale MPIC interrupt controller is found on all PowerQUICC 14 - compatible 22 - reg 24 Value type: <prop-encoded-array> 29 - interrupt-controller 33 controller 35 - #interrupt-cells 39 specifiers do not contain the interrupt-type or type-specific 42 - #address-cells [all …]`
H A D	pamu.txt	`5 The PAMU is an I/O MMU that provides device-to-memory access control and 10 - compatible : <string> 11 First entry is a version-specific string, such as 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 13 - ranges : <prop-encoded-array> 15 I/O space utilized by the controller. The size should 20 - interrupts : <prop-encoded-array> 25 - #address-cells: <u32> 27 - #size-cells : <u32> 31 - reg : <prop-encoded-array> [all …]`
/freebsd/sys/contrib/device-tree/Bindings/input/
H A D	samsung-keypad.txt	1 * Samsung's Keypad Controller device tree bindings 3 Samsung's Keypad controller is used to interface a SoC with a matrix-type 4 keypad device. The keypad controller supports multiple row and column lines. 6 The keypad controller can sense a key-press and key-release and report the 9 Required SoC Specific Properties: 10 - compatible: should be one of the following 11 - "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad 12 controller. 13 - "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad 14 controller. [all …]
H A D	brcm,bcm-keypad.txt	1 * Broadcom Keypad Controller device tree bindings 3 Broadcom Keypad controller is used to interface a SoC with a matrix-type 4 keypad device. The keypad controller supports multiple row and column lines. 6 The keypad controller can sense a key-press and key-release and report the 9 This binding is based on the matrix-keymap binding with the following 12 keypad,num-rows and keypad,num-columns are required. 14 Required SoC Specific Properties: 15 - compatible: should be "brcm,bcm-keypad" 17 - reg: physical base address of the controller and length of memory mapped 20 - interrupts: The interrupt number to the cpu. [all …]
/freebsd/sbin/nvmecontrol/
H A D	nvmecontrol.8	`3 .\" Copyright (c) 2018-2019 Alexander Motin <mav@FreeBSD.org> 51 .Aq Ar device-id \| Ar namespace-id 59 .Aq Ar namespace-id 62 .Aq Ar device-id 67 .Op Fl v Ar vendor-string 72 .Aq Ar device-id \| Ar namespace-id 75 .Aq Ar device-id 78 .Aq Ar device-id 83 .Aq Ar device-id 87 .Aq Ar device-id [all …]`
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A D	pinctrl-mt8183.txt	1 * Mediatek MT8183 Pin Controller 3 The Mediatek's Pin controller is used to control SoC pins. 6 - compatible: value should be one of the following. 7 "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl. 8 - gpio-controller : Marks the device node as a gpio controller. 9 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO 12 - gpio-ranges : gpio valid number range. 13 - reg: physical address base for gpio base registers. There are 10 GPIO 17 - reg-names: gpio base register names. There are 10 gpio base register 20 - interrupt-controller: Marks the device node as an interrupt controller [all …]
/freebsd/share/doc/smm/02.config/
H A D	4.t	14 .\" without specific prior written permission. 33 In this section we consider the specific rules used in writing 43 parameters specific to each 80 \-DFUNNY \-DHAHA in the resultant makefile. 123 This is usually a cute name like ERNIE (short for Ernie Co-Vax) or 126 and is also used to locate an optional list of source files specific 139 system specific devices may be different. A system image is specified 142 \fBconfig\fP\ \fIsysname\fP\ \fIconfig-clauses\fP 161 \fBroot\fP [ \fBon\fP ] \fIroot-device\fP 162 \fBswap\fP [ \fBon\fP ] \fIswap-device\fP [ \fBand\fP \fIswap-device\fP ] ... [all …]
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A D	rcar_canfd.txt	1 Renesas R-Car CAN FD controller Device Tree Bindings 2 ---------------------------------------------------- 5 - compatible: Must contain one or more of the following: 6 - "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers. 7 - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. 8 - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller. 9 - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. 10 - "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller. 11 - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. 12 - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. [all …]
/freebsd/sys/dev/isci/scil/
H A D	scif_sas_design.h	1 /- 2 SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0 9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 61 - Nathan Marushak 64 - Richard Boyd 68 This document provides design information relating to the SAS specific 71 of the SCU Software Architecture Specification, the Storage Controller 79 developer to code for a specific task. The developer is not encumbered [all …]
H A D	scif_sas_controller_state_handlers.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0 9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 60 * of the controller states defined by the SCI_BASE_CONTROLLER state 84 * controller for execute the reset. 107 &fw_controller->parent.state_machine, in scif_sas_controller_execute_reset() 113 status = fw_controller->operation_status; in scif_sas_controller_execute_reset() 114 fw_controller->operation_status = SCI_SUCCESS; in scif_sas_controller_execute_reset() [all …]
H A D	scic_logger.h	1 /- 2 SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0 9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 60 * @brief This file contains all of the SCI Core specific logger object 74 /** Enables/disables logging specific to the library. / 77 /* Enables/disables logging specific to the controller. / 80 /* Enables/disables logging specific to the sas port. / 83 /* Enables/disables logging specific to the SAS phy. */ [all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A D	mc-peripheral-props.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Peripheral-specific properties for a Memory Controller bus. 11 They could be common properties like reg or they could be controller 12 specific like delay in clock or data lines, etc. These properties need 13 to be defined in the peripheral node because they are per-peripheral 14 and there can be multiple peripherals attached to a controller. All 15 those properties are listed here. The controller specific properties [all …]
/freebsd/lib/libnvmf/
H A D	libnvmf.h	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2022-2024 Chelsio Communications, Inc. 24 * Parameters shared by all queue-pairs of an association. Note that 30 bool dynamic_controller_model; /* Controller only / 31 uint16_t max_admin_qsize; / Controller only / 32 uint32_t max_io_qsize; / Controller only, 0 for discovery / 35 uint8_t pda; / Tx-side PDA. / 39 uint32_t maxh2cdata; / Controller only / 44 / Parameters specific to a single queue pair of an association. */ [all …]
/freebsd/sys/dev/isci/
H A D	isci.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 6 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 92 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 93 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 94 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 95 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 189 struct ISCI_CONTROLLER controller = &isci->controllers[i]; isci_detach() local 348 struct ISCI_CONTROLLER controller = &isci->controllers[index]; isci_initialize() local 407 isci_allocate_dma_buffer(device_t device,struct ISCI_CONTROLLER * controller,struct ISCI_MEMORY * memory) isci_allocate_dma_buffer() argument 462 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller,SCI_LOCK_HANDLE_T lock) scif_cb_lock_associate() argument 483 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller,SCI_LOCK_HANDLE_T lock) scif_cb_lock_disassociate() argument 501 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller,SCI_LOCK_HANDLE_T lock) scif_cb_lock_acquire() argument 517 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller,SCI_LOCK_HANDLE_T lock) scif_cb_lock_release() argument 533 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) scif_cb_start_internal_io_task_create() argument 649 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller,uint16_t bar_number) scic_cb_pci_get_bar() argument 673 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller,SCI_PORT_HANDLE_T port,SCI_PHY_HANDLE_T phy) scic_cb_port_invalid_link_up() argument [all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A D	ti,j721e-system-controller.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI J721e System Controller Registers R/W 12 System controller node represents a register region containing a set 14 represent as any specific type of device. The typical use-case is 15 for some other node's driver, or platform-specific code, to acquire 17 search using a specific compatible value), interrogate the node (or [all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A D	ti,j721e-system-controller.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI J721e System Controller Registers R/W 12 System controller node represents a register region containing a set 14 represent as any specific type of device. The typical use-case is 15 for some other node's driver, or platform-specific code, to acquire 17 search using a specific compatible value), interrogate the node (or [all …]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A D	brcm,brcmnand.txt	1 * Broadcom STB NAND Controller 3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 4 flash chips. It has a memory-mapped register interface for both control 5 registers and for its data input/output buffer. On some SoCs, this controller is 9 This controller was originally designed for STB SoCs (BCM7xxx) but is now 15 - compatible : May contain an SoC-specific compatibility string (see below) 16 to account for any SoC-specific hardware bits that may be 17 added on top of the base core controller. 19 the core NAND controller, of the following form: 21 string, like "brcm,brcmnand-v7.0" [all …]
H A D	brcm,brcmnand.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 12 - William Zhang <william.zhang@broadcom.com> 15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 16 flash chips. It has a memory-mapped register interface for both control 17 registers and for its data input/output buffer. On some SoCs, this controller [all …]
/freebsd/contrib/file/magic/Magdir/
H A D	pci_ids	2 #------------------------------------------------------------------------------ 4 # pci.ids: file(1) magic for PCI specific informations 7 # Vendor identification (ID) https://pci-ids.ucw.cz/v2.2/pci.ids 9 0 name PCI-vendor 42 # https://blog.ladsai.com/pci-configuration-space-class-code.html 45 0 name PCI-class 50 # Any device except for VGA-Compatible devices like: 2975BIOS.BIN Trm3x5.bin 51 # BUT also NVidia44.bin vgabios-stdvga-bin.rom 53 # VGA-Compatible Device; NO EXAMPLE found here!! 57 >>0 ubyte 0x01 storage controller [all …]

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