1f11c7f63SJim Harris /*- 2718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause 3718cf2ccSPedro F. Giffuni * 4f11c7f63SJim Harris * BSD LICENSE 5f11c7f63SJim Harris * 6f11c7f63SJim Harris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 7f11c7f63SJim Harris * All rights reserved. 8f11c7f63SJim Harris * 9f11c7f63SJim Harris * Redistribution and use in source and binary forms, with or without 10f11c7f63SJim Harris * modification, are permitted provided that the following conditions 11f11c7f63SJim Harris * are met: 12f11c7f63SJim Harris * 13f11c7f63SJim Harris * * Redistributions of source code must retain the above copyright 14f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer. 15f11c7f63SJim Harris * * Redistributions in binary form must reproduce the above copyright 16f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer in 17f11c7f63SJim Harris * the documentation and/or other materials provided with the 18f11c7f63SJim Harris * distribution. 19f11c7f63SJim Harris * 20f11c7f63SJim Harris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21f11c7f63SJim Harris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22f11c7f63SJim Harris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23f11c7f63SJim Harris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24f11c7f63SJim Harris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25f11c7f63SJim Harris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26f11c7f63SJim Harris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27f11c7f63SJim Harris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28f11c7f63SJim Harris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29f11c7f63SJim Harris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30f11c7f63SJim Harris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31f11c7f63SJim Harris */ 32f11c7f63SJim Harris 33f11c7f63SJim Harris #include <sys/cdefs.h> 34f11c7f63SJim Harris #include <dev/isci/isci.h> 35f11c7f63SJim Harris 36f11c7f63SJim Harris #include <sys/sysctl.h> 37f11c7f63SJim Harris #include <sys/malloc.h> 38f11c7f63SJim Harris 39f11c7f63SJim Harris #include <cam/cam_periph.h> 40f11c7f63SJim Harris 4137274fc0SJim Harris #include <dev/led/led.h> 4237274fc0SJim Harris 43f11c7f63SJim Harris #include <dev/pci/pcireg.h> 44f11c7f63SJim Harris #include <dev/pci/pcivar.h> 45f11c7f63SJim Harris 46f11c7f63SJim Harris #include <dev/isci/scil/scic_logger.h> 47f11c7f63SJim Harris #include <dev/isci/scil/scic_library.h> 4837274fc0SJim Harris #include <dev/isci/scil/scic_sgpio.h> 49f11c7f63SJim Harris #include <dev/isci/scil/scic_user_callback.h> 50f11c7f63SJim Harris 51f11c7f63SJim Harris #include <dev/isci/scil/scif_controller.h> 52f11c7f63SJim Harris #include <dev/isci/scil/scif_library.h> 53f11c7f63SJim Harris #include <dev/isci/scil/scif_logger.h> 54f11c7f63SJim Harris #include <dev/isci/scil/scif_user_callback.h> 55f11c7f63SJim Harris 56f11c7f63SJim Harris MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 57f11c7f63SJim Harris 58f11c7f63SJim Harris struct isci_softc *g_isci; 59f11c7f63SJim Harris uint32_t g_isci_debug_level = 0; 60f11c7f63SJim Harris 61f11c7f63SJim Harris static int isci_probe(device_t); 62f11c7f63SJim Harris static int isci_attach(device_t); 63f11c7f63SJim Harris static int isci_detach(device_t); 64f11c7f63SJim Harris 65f11c7f63SJim Harris int isci_initialize(struct isci_softc *isci); 66f11c7f63SJim Harris 67f11c7f63SJim Harris void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 68f11c7f63SJim Harris int nseg, int error); 69f11c7f63SJim Harris 70f11c7f63SJim Harris static device_method_t isci_pci_methods[] = { 71f11c7f63SJim Harris /* Device interface */ 72f11c7f63SJim Harris DEVMETHOD(device_probe, isci_probe), 73f11c7f63SJim Harris DEVMETHOD(device_attach, isci_attach), 74f11c7f63SJim Harris DEVMETHOD(device_detach, isci_detach), 75f11c7f63SJim Harris { 0, 0 } 76f11c7f63SJim Harris }; 77f11c7f63SJim Harris 78f11c7f63SJim Harris static driver_t isci_pci_driver = { 79f11c7f63SJim Harris "isci", 80f11c7f63SJim Harris isci_pci_methods, 81f11c7f63SJim Harris sizeof(struct isci_softc), 82f11c7f63SJim Harris }; 83f11c7f63SJim Harris 84c59cc8f8SJohn Baldwin DRIVER_MODULE(isci, pci, isci_pci_driver, 0, 0); 8550fbc8e7SKonstantin Belousov MODULE_DEPEND(isci, cam, 1, 1, 1); 86f11c7f63SJim Harris 87f11c7f63SJim Harris static struct _pcsid 88f11c7f63SJim Harris { 89f11c7f63SJim Harris u_int32_t type; 90f11c7f63SJim Harris const char *desc; 91f11c7f63SJim Harris } pci_ids[] = { 92f11c7f63SJim Harris { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 93f11c7f63SJim Harris { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 94f11c7f63SJim Harris { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 95f11c7f63SJim Harris { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 96f11c7f63SJim Harris { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 97f11c7f63SJim Harris { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 98f11c7f63SJim Harris { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 99f11c7f63SJim Harris { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 100f11c7f63SJim Harris { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 101f11c7f63SJim Harris { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 102f11c7f63SJim Harris { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 103f11c7f63SJim Harris { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 104b4b494e1SSean Bruno { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 105b4b494e1SSean Bruno { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 106b4b494e1SSean Bruno { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 107b4b494e1SSean Bruno { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 108f11c7f63SJim Harris { 0x00000000, NULL } 109f11c7f63SJim Harris }; 110f11c7f63SJim Harris 111f11c7f63SJim Harris static int 112f11c7f63SJim Harris isci_probe (device_t device) 113f11c7f63SJim Harris { 114f11c7f63SJim Harris u_int32_t type = pci_get_devid(device); 115f11c7f63SJim Harris struct _pcsid *ep = pci_ids; 116f11c7f63SJim Harris 117f11c7f63SJim Harris while (ep->type && ep->type != type) 118f11c7f63SJim Harris ++ep; 119f11c7f63SJim Harris 120f11c7f63SJim Harris if (ep->desc) 121f11c7f63SJim Harris { 122f11c7f63SJim Harris device_set_desc(device, ep->desc); 123b4b494e1SSean Bruno return (BUS_PROBE_DEFAULT); 124f11c7f63SJim Harris } 125f11c7f63SJim Harris else 126f11c7f63SJim Harris return (ENXIO); 127f11c7f63SJim Harris } 128f11c7f63SJim Harris 129f11c7f63SJim Harris static int 130f11c7f63SJim Harris isci_allocate_pci_memory(struct isci_softc *isci) 131f11c7f63SJim Harris { 132f11c7f63SJim Harris int i; 133f11c7f63SJim Harris 134f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 135f11c7f63SJim Harris { 136f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 137f11c7f63SJim Harris 138f11c7f63SJim Harris pci_bar->resource_id = PCIR_BAR(i*2); 13943cd6160SJustin Hibbits pci_bar->resource = bus_alloc_resource_any(isci->device, 14043cd6160SJustin Hibbits SYS_RES_MEMORY, &pci_bar->resource_id, 141f11c7f63SJim Harris RF_ACTIVE); 142f11c7f63SJim Harris 143f11c7f63SJim Harris if(pci_bar->resource == NULL) 144f11c7f63SJim Harris isci_log_message(0, "ISCI", 145f11c7f63SJim Harris "unable to allocate pci resource\n"); 146f11c7f63SJim Harris else { 147f11c7f63SJim Harris pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 148f11c7f63SJim Harris pci_bar->bus_handle = 149f11c7f63SJim Harris rman_get_bushandle(pci_bar->resource); 150f11c7f63SJim Harris } 151f11c7f63SJim Harris } 152f11c7f63SJim Harris 153f11c7f63SJim Harris return (0); 154f11c7f63SJim Harris } 155f11c7f63SJim Harris 156f11c7f63SJim Harris static int 157f11c7f63SJim Harris isci_attach(device_t device) 158f11c7f63SJim Harris { 159f11c7f63SJim Harris int error; 160f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 161f11c7f63SJim Harris 162f11c7f63SJim Harris g_isci = isci; 163f11c7f63SJim Harris isci->device = device; 164c1612040SJim Harris pci_enable_busmaster(device); 165f11c7f63SJim Harris 166f11c7f63SJim Harris isci_allocate_pci_memory(isci); 167f11c7f63SJim Harris 168f11c7f63SJim Harris error = isci_initialize(isci); 169f11c7f63SJim Harris 170f11c7f63SJim Harris if (error) 171f11c7f63SJim Harris { 172f11c7f63SJim Harris isci_detach(device); 173f11c7f63SJim Harris return (error); 174f11c7f63SJim Harris } 175f11c7f63SJim Harris 176f11c7f63SJim Harris isci_interrupt_setup(isci); 177f11c7f63SJim Harris isci_sysctl_initialize(isci); 178f11c7f63SJim Harris 179f11c7f63SJim Harris return (0); 180f11c7f63SJim Harris } 181f11c7f63SJim Harris 182f11c7f63SJim Harris static int 183f11c7f63SJim Harris isci_detach(device_t device) 184f11c7f63SJim Harris { 185f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 18637274fc0SJim Harris int i, phy; 187f11c7f63SJim Harris 188f11c7f63SJim Harris for (i = 0; i < isci->controller_count; i++) { 189f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 190f11c7f63SJim Harris SCI_STATUS status; 1913e0a9f1fSJim Harris void *unmap_buffer; 192f11c7f63SJim Harris 193f11c7f63SJim Harris if (controller->scif_controller_handle != NULL) { 194f11c7f63SJim Harris scic_controller_disable_interrupts( 195f11c7f63SJim Harris scif_controller_get_scic_handle(controller->scif_controller_handle)); 196f11c7f63SJim Harris 197f11c7f63SJim Harris mtx_lock(&controller->lock); 198f11c7f63SJim Harris status = scif_controller_stop(controller->scif_controller_handle, 0); 199f11c7f63SJim Harris mtx_unlock(&controller->lock); 200f11c7f63SJim Harris 201f11c7f63SJim Harris while (controller->is_started == TRUE) { 202f11c7f63SJim Harris /* Now poll for interrupts until the controller stop complete 203f11c7f63SJim Harris * callback is received. 204f11c7f63SJim Harris */ 205f11c7f63SJim Harris mtx_lock(&controller->lock); 206f11c7f63SJim Harris isci_interrupt_poll_handler(controller); 207f11c7f63SJim Harris mtx_unlock(&controller->lock); 208f11c7f63SJim Harris pause("isci", 1); 209f11c7f63SJim Harris } 210f11c7f63SJim Harris 211f11c7f63SJim Harris if(controller->sim != NULL) { 212f11c7f63SJim Harris mtx_lock(&controller->lock); 213f11c7f63SJim Harris xpt_free_path(controller->path); 214f11c7f63SJim Harris xpt_bus_deregister(cam_sim_path(controller->sim)); 215f11c7f63SJim Harris cam_sim_free(controller->sim, TRUE); 216f11c7f63SJim Harris mtx_unlock(&controller->lock); 217f11c7f63SJim Harris } 218f11c7f63SJim Harris } 219f11c7f63SJim Harris 220f11c7f63SJim Harris if (controller->timer_memory != NULL) 221f11c7f63SJim Harris free(controller->timer_memory, M_ISCI); 222f11c7f63SJim Harris 223f11c7f63SJim Harris if (controller->remote_device_memory != NULL) 224f11c7f63SJim Harris free(controller->remote_device_memory, M_ISCI); 2253e0a9f1fSJim Harris 226500cbe13SJim Harris for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 227500cbe13SJim Harris if (controller->phys[phy].cdev_fault) 228500cbe13SJim Harris led_destroy(controller->phys[phy].cdev_fault); 229500cbe13SJim Harris 230500cbe13SJim Harris if (controller->phys[phy].cdev_locate) 231500cbe13SJim Harris led_destroy(controller->phys[phy].cdev_locate); 232500cbe13SJim Harris } 23337274fc0SJim Harris 2343e0a9f1fSJim Harris while (1) { 2353e0a9f1fSJim Harris sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 2363e0a9f1fSJim Harris if (unmap_buffer == NULL) 2373e0a9f1fSJim Harris break; 238*d1bdc282SBjoern A. Zeeb free(unmap_buffer, M_ISCI); 2393e0a9f1fSJim Harris } 240f11c7f63SJim Harris } 241f11c7f63SJim Harris 242f11c7f63SJim Harris /* The SCIF controllers have been stopped, so we can now 243f11c7f63SJim Harris * free the SCI library memory. 244f11c7f63SJim Harris */ 245f11c7f63SJim Harris if (isci->sci_library_memory != NULL) 246f11c7f63SJim Harris free(isci->sci_library_memory, M_ISCI); 247f11c7f63SJim Harris 248f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 249f11c7f63SJim Harris { 250f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 251f11c7f63SJim Harris 252f11c7f63SJim Harris if (pci_bar->resource != NULL) 253f11c7f63SJim Harris bus_release_resource(device, SYS_RES_MEMORY, 254f11c7f63SJim Harris pci_bar->resource_id, pci_bar->resource); 255f11c7f63SJim Harris } 256f11c7f63SJim Harris 257f11c7f63SJim Harris for (i = 0; i < isci->num_interrupts; i++) 258f11c7f63SJim Harris { 259f11c7f63SJim Harris struct ISCI_INTERRUPT_INFO *interrupt_info; 260f11c7f63SJim Harris 261f11c7f63SJim Harris interrupt_info = &isci->interrupt_info[i]; 262f11c7f63SJim Harris 263f11c7f63SJim Harris if(interrupt_info->tag != NULL) 264f11c7f63SJim Harris bus_teardown_intr(device, interrupt_info->res, 265f11c7f63SJim Harris interrupt_info->tag); 266f11c7f63SJim Harris 267f11c7f63SJim Harris if(interrupt_info->res != NULL) 268f11c7f63SJim Harris bus_release_resource(device, SYS_RES_IRQ, 269f11c7f63SJim Harris rman_get_rid(interrupt_info->res), 270f11c7f63SJim Harris interrupt_info->res); 271f11c7f63SJim Harris 272f11c7f63SJim Harris pci_release_msi(device); 273f11c7f63SJim Harris } 274c1612040SJim Harris pci_disable_busmaster(device); 275f11c7f63SJim Harris 276f11c7f63SJim Harris return (0); 277f11c7f63SJim Harris } 278f11c7f63SJim Harris 279f11c7f63SJim Harris int 280f11c7f63SJim Harris isci_initialize(struct isci_softc *isci) 281f11c7f63SJim Harris { 282f11c7f63SJim Harris int error; 283f11c7f63SJim Harris uint32_t status = 0; 284f11c7f63SJim Harris uint32_t library_object_size; 285f11c7f63SJim Harris uint32_t verbosity_mask; 286f11c7f63SJim Harris uint32_t scic_log_object_mask; 287f11c7f63SJim Harris uint32_t scif_log_object_mask; 288f11c7f63SJim Harris uint8_t *header_buffer; 289f11c7f63SJim Harris 290f11c7f63SJim Harris library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 291f11c7f63SJim Harris 292f11c7f63SJim Harris isci->sci_library_memory = 293f11c7f63SJim Harris malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 294f11c7f63SJim Harris 295f11c7f63SJim Harris isci->sci_library_handle = scif_library_construct( 296f11c7f63SJim Harris isci->sci_library_memory, SCI_MAX_CONTROLLERS); 297f11c7f63SJim Harris 298f11c7f63SJim Harris sci_object_set_association( isci->sci_library_handle, (void *)isci); 299f11c7f63SJim Harris 300f11c7f63SJim Harris verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 301f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 302f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_TRACE); 303f11c7f63SJim Harris 304f11c7f63SJim Harris scic_log_object_mask = 0xFFFFFFFF; 305f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 306f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 307f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 308f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 309f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 310f11c7f63SJim Harris 311f11c7f63SJim Harris scif_log_object_mask = 0xFFFFFFFF; 312f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 313f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 314f11c7f63SJim Harris 315f11c7f63SJim Harris TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 316f11c7f63SJim Harris 317f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 318f11c7f63SJim Harris scif_log_object_mask, verbosity_mask); 319f11c7f63SJim Harris 320f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger( 321f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)), 322f11c7f63SJim Harris scic_log_object_mask, verbosity_mask); 323f11c7f63SJim Harris 324f11c7f63SJim Harris header_buffer = (uint8_t *)&isci->pci_common_header; 325f11c7f63SJim Harris for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 326f11c7f63SJim Harris header_buffer[i] = pci_read_config(isci->device, i, 1); 327f11c7f63SJim Harris 328f11c7f63SJim Harris scic_library_set_pci_info( 329f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle), 330f11c7f63SJim Harris &isci->pci_common_header); 331f11c7f63SJim Harris 332f11c7f63SJim Harris isci->oem_parameters_found = FALSE; 333f11c7f63SJim Harris 334f11c7f63SJim Harris isci_get_oem_parameters(isci); 335f11c7f63SJim Harris 336f11c7f63SJim Harris /* trigger interrupt if 32 completions occur before timeout expires */ 337f11c7f63SJim Harris isci->coalesce_number = 32; 338f11c7f63SJim Harris 339f11c7f63SJim Harris /* trigger interrupt if 2 microseconds elapse after a completion occurs, 340f11c7f63SJim Harris * regardless if "coalesce_number" completions have occurred 341f11c7f63SJim Harris */ 342f11c7f63SJim Harris isci->coalesce_timeout = 2; 343f11c7f63SJim Harris 344f11c7f63SJim Harris isci->controller_count = scic_library_get_pci_device_controller_count( 345f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)); 346f11c7f63SJim Harris 347f11c7f63SJim Harris for (int index = 0; index < isci->controller_count; index++) { 348f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 349f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller_handle; 350f11c7f63SJim Harris 351f11c7f63SJim Harris controller->index = index; 352f11c7f63SJim Harris isci_controller_construct(controller, isci); 353f11c7f63SJim Harris 354f11c7f63SJim Harris scif_controller_handle = controller->scif_controller_handle; 355f11c7f63SJim Harris 356f11c7f63SJim Harris status = isci_controller_initialize(controller); 357f11c7f63SJim Harris 358f11c7f63SJim Harris if(status != SCI_SUCCESS) { 359f11c7f63SJim Harris isci_log_message(0, "ISCI", 360f11c7f63SJim Harris "isci_controller_initialize FAILED: %x\n", 361f11c7f63SJim Harris status); 362f11c7f63SJim Harris return (status); 363f11c7f63SJim Harris } 364f11c7f63SJim Harris 365f11c7f63SJim Harris error = isci_controller_allocate_memory(controller); 366f11c7f63SJim Harris 367f11c7f63SJim Harris if (error != 0) 368f11c7f63SJim Harris return (error); 369f11c7f63SJim Harris 370f11c7f63SJim Harris scif_controller_set_interrupt_coalescence( 371f11c7f63SJim Harris scif_controller_handle, isci->coalesce_number, 372f11c7f63SJim Harris isci->coalesce_timeout); 373f11c7f63SJim Harris } 374f11c7f63SJim Harris 375f11c7f63SJim Harris /* FreeBSD provides us a hook to ensure we get a chance to start 376f11c7f63SJim Harris * our controllers and complete initial domain discovery before 377f11c7f63SJim Harris * it searches for the boot device. Once we're done, we'll 378f11c7f63SJim Harris * disestablish the hook, signaling the kernel that is can proceed 379f11c7f63SJim Harris * with the boot process. 380f11c7f63SJim Harris */ 381f11c7f63SJim Harris isci->config_hook.ich_func = &isci_controller_start; 382f11c7f63SJim Harris isci->config_hook.ich_arg = &isci->controllers[0]; 383f11c7f63SJim Harris 384f11c7f63SJim Harris if (config_intrhook_establish(&isci->config_hook) != 0) 385f11c7f63SJim Harris isci_log_message(0, "ISCI", 386f11c7f63SJim Harris "config_intrhook_establish failed!\n"); 387f11c7f63SJim Harris 388f11c7f63SJim Harris return (status); 389f11c7f63SJim Harris } 390f11c7f63SJim Harris 391f11c7f63SJim Harris void 392f11c7f63SJim Harris isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 393f11c7f63SJim Harris int nseg, int error) 394f11c7f63SJim Harris { 395f11c7f63SJim Harris struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 396f11c7f63SJim Harris 397f11c7f63SJim Harris memory->error = error; 398f11c7f63SJim Harris 399f11c7f63SJim Harris if (nseg != 1 || error != 0) 400f11c7f63SJim Harris isci_log_message(0, "ISCI", 401f11c7f63SJim Harris "Failed to allocate physically contiguous memory!\n"); 402f11c7f63SJim Harris else 403f11c7f63SJim Harris memory->physical_address = seg->ds_addr; 404f11c7f63SJim Harris } 405f11c7f63SJim Harris 406f11c7f63SJim Harris int 407dad0dd21SKonstantin Belousov isci_allocate_dma_buffer(device_t device, struct ISCI_CONTROLLER *controller, 408dad0dd21SKonstantin Belousov struct ISCI_MEMORY *memory) 409f11c7f63SJim Harris { 410f11c7f63SJim Harris uint32_t status; 411f11c7f63SJim Harris 412f11c7f63SJim Harris status = bus_dma_tag_create(bus_get_dma_tag(device), 413f6ccd325SWarner Losh 0x40 /* cacheline alignment */, 414f6ccd325SWarner Losh ISCI_DMA_BOUNDARY, BUS_SPACE_MAXADDR, 415f11c7f63SJim Harris BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 416f11c7f63SJim Harris 0x1 /* we want physically contiguous */, 417dad0dd21SKonstantin Belousov memory->size, 0, busdma_lock_mutex, &controller->lock, 418dad0dd21SKonstantin Belousov &memory->dma_tag); 419f11c7f63SJim Harris 420f11c7f63SJim Harris if(status == ENOMEM) { 421f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 422f11c7f63SJim Harris return (status); 423f11c7f63SJim Harris } 424f11c7f63SJim Harris 425f11c7f63SJim Harris status = bus_dmamem_alloc(memory->dma_tag, 426f11c7f63SJim Harris (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 427f11c7f63SJim Harris 428f11c7f63SJim Harris if(status == ENOMEM) 429f11c7f63SJim Harris { 430f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 431f11c7f63SJim Harris return (status); 432f11c7f63SJim Harris } 433f11c7f63SJim Harris 434f11c7f63SJim Harris status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 435f11c7f63SJim Harris (void *)memory->virtual_address, memory->size, 436f11c7f63SJim Harris isci_allocate_dma_buffer_callback, memory, 0); 437f11c7f63SJim Harris 438f11c7f63SJim Harris if(status == EINVAL) 439f11c7f63SJim Harris { 440f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 441f11c7f63SJim Harris return (status); 442f11c7f63SJim Harris } 443f11c7f63SJim Harris 444f11c7f63SJim Harris return (0); 445f11c7f63SJim Harris } 446f11c7f63SJim Harris 447f11c7f63SJim Harris /** 448f11c7f63SJim Harris * @brief This callback method asks the user to associate the supplied 449f11c7f63SJim Harris * lock with an operating environment specific locking construct. 450f11c7f63SJim Harris * 451f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 452f11c7f63SJim Harris * which this lock is to be associated. 453f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 454f11c7f63SJim Harris * user should associate an operating environment specific 455f11c7f63SJim Harris * locking object. 456f11c7f63SJim Harris * 457f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 458f11c7f63SJim Harris * 459f11c7f63SJim Harris * @return none. 460f11c7f63SJim Harris */ 461f11c7f63SJim Harris void 462f11c7f63SJim Harris scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 463f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 464f11c7f63SJim Harris { 465f11c7f63SJim Harris 466f11c7f63SJim Harris } 467f11c7f63SJim Harris 468f11c7f63SJim Harris /** 469f11c7f63SJim Harris * @brief This callback method asks the user to de-associate the supplied 470f11c7f63SJim Harris * lock with an operating environment specific locking construct. 471f11c7f63SJim Harris * 472f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 473f11c7f63SJim Harris * which this lock is to be de-associated. 474f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 475f11c7f63SJim Harris * user should de-associate an operating environment specific 476f11c7f63SJim Harris * locking object. 477f11c7f63SJim Harris * 478f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 479f11c7f63SJim Harris * 480f11c7f63SJim Harris * @return none. 481f11c7f63SJim Harris */ 482f11c7f63SJim Harris void 483f11c7f63SJim Harris scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 484f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 485f11c7f63SJim Harris { 486f11c7f63SJim Harris 487f11c7f63SJim Harris } 488f11c7f63SJim Harris 489f11c7f63SJim Harris 490f11c7f63SJim Harris /** 491f11c7f63SJim Harris * @brief This callback method asks the user to acquire/get the lock. 492f11c7f63SJim Harris * This method should pend until the lock has been acquired. 493f11c7f63SJim Harris * 494f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 495f11c7f63SJim Harris * which this lock is associated. 496f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be acquired. 497f11c7f63SJim Harris * 498f11c7f63SJim Harris * @return none 499f11c7f63SJim Harris */ 500f11c7f63SJim Harris void 501f11c7f63SJim Harris scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 502f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 503f11c7f63SJim Harris { 504f11c7f63SJim Harris 505f11c7f63SJim Harris } 506f11c7f63SJim Harris 507f11c7f63SJim Harris /** 508f11c7f63SJim Harris * @brief This callback method asks the user to release a lock. 509f11c7f63SJim Harris * 510f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 511f11c7f63SJim Harris * which this lock is associated. 512f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be released. 513f11c7f63SJim Harris * 514f11c7f63SJim Harris * @return none 515f11c7f63SJim Harris */ 516f11c7f63SJim Harris void 517f11c7f63SJim Harris scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 518f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 519f11c7f63SJim Harris { 520f11c7f63SJim Harris } 521f11c7f63SJim Harris 522f11c7f63SJim Harris /** 523f11c7f63SJim Harris * @brief This callback method creates an OS specific deferred task 524f11c7f63SJim Harris * for internal usage. The handler to deferred task is stored by OS 525f11c7f63SJim Harris * driver. 526f11c7f63SJim Harris * 527f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller object 528f11c7f63SJim Harris * with which this callback is associated. 529f11c7f63SJim Harris * 530f11c7f63SJim Harris * @return none 531f11c7f63SJim Harris */ 532f11c7f63SJim Harris void 533f11c7f63SJim Harris scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 534f11c7f63SJim Harris { 535f11c7f63SJim Harris 536f11c7f63SJim Harris } 537f11c7f63SJim Harris 538f11c7f63SJim Harris /** 539f11c7f63SJim Harris * @brief This callback method schedules a OS specific deferred task. 540f11c7f63SJim Harris * 541f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller 542f11c7f63SJim Harris * object with which this callback is associated. 543f11c7f63SJim Harris * @param[in] start_internal_io_task_routine This parameter specifies the 544f11c7f63SJim Harris * sci start_internal_io routine. 545f11c7f63SJim Harris * @param[in] context This parameter specifies a handle to a parameter 546f11c7f63SJim Harris * that will be passed into the "start_internal_io_task_routine" 547f11c7f63SJim Harris * when it is invoked. 548f11c7f63SJim Harris * 549f11c7f63SJim Harris * @return none 550f11c7f63SJim Harris */ 551f11c7f63SJim Harris void 552f11c7f63SJim Harris scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 553f11c7f63SJim Harris FUNCPTR start_internal_io_task_routine, void *context) 554f11c7f63SJim Harris { 555f11c7f63SJim Harris /** @todo Use FreeBSD tasklet to defer this routine to a later time, 556f11c7f63SJim Harris * rather than calling the routine inline. 557f11c7f63SJim Harris */ 558f11c7f63SJim Harris SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 559f11c7f63SJim Harris (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 560f11c7f63SJim Harris 561f11c7f63SJim Harris sci_start_internal_io_routine(context); 562f11c7f63SJim Harris } 563f11c7f63SJim Harris 564f11c7f63SJim Harris /** 565f11c7f63SJim Harris * @brief In this method the user must write to PCI memory via access. 566f11c7f63SJim Harris * This method is used for access to memory space and IO space. 567f11c7f63SJim Harris * 568f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 569f11c7f63SJim Harris * @param[in] address This parameter depicts the address into 570f11c7f63SJim Harris * which to write. 571f11c7f63SJim Harris * @param[out] write_value This parameter depicts the value being written 572f11c7f63SJim Harris * into the PCI memory location. 573f11c7f63SJim Harris * 574f11c7f63SJim Harris * @todo These PCI memory access calls likely needs to be optimized into macros? 575f11c7f63SJim Harris */ 576f11c7f63SJim Harris void 577f11c7f63SJim Harris scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 578f11c7f63SJim Harris void *address, uint32_t write_value) 579f11c7f63SJim Harris { 580f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 581f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 582f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 583f11c7f63SJim Harris (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 584f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 585f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 586f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 587f11c7f63SJim Harris 588f11c7f63SJim Harris bus_space_write_4(isci->pci_bar[bar].bus_tag, 589f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset, write_value); 590f11c7f63SJim Harris } 591f11c7f63SJim Harris 592f11c7f63SJim Harris /** 593f11c7f63SJim Harris * @brief In this method the user must read from PCI memory via access. 594f11c7f63SJim Harris * This method is used for access to memory space and IO space. 595f11c7f63SJim Harris * 596f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 597f11c7f63SJim Harris * @param[in] address This parameter depicts the address from 598f11c7f63SJim Harris * which to read. 599f11c7f63SJim Harris * 600f11c7f63SJim Harris * @return The value being returned from the PCI memory location. 601f11c7f63SJim Harris * 602f11c7f63SJim Harris * @todo This PCI memory access calls likely need to be optimized into macro? 603f11c7f63SJim Harris */ 604f11c7f63SJim Harris uint32_t 605f11c7f63SJim Harris scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 606f11c7f63SJim Harris { 607f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 608f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 609f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 610f11c7f63SJim Harris (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 611f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 612f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 613f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 614f11c7f63SJim Harris 615f11c7f63SJim Harris return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 616f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset)); 617f11c7f63SJim Harris } 618f11c7f63SJim Harris 619f11c7f63SJim Harris /** 620f11c7f63SJim Harris * @brief This method is called when the core requires the OS driver 621f11c7f63SJim Harris * to stall execution. This method is utilized during initialization 622f11c7f63SJim Harris * or non-performance paths only. 623f11c7f63SJim Harris * 624f11c7f63SJim Harris * @param[in] microseconds This parameter specifies the number of 625f11c7f63SJim Harris * microseconds for which to stall. The operating system driver 626f11c7f63SJim Harris * is allowed to round this value up where necessary. 627f11c7f63SJim Harris * 628f11c7f63SJim Harris * @return none. 629f11c7f63SJim Harris */ 630f11c7f63SJim Harris void 631f11c7f63SJim Harris scic_cb_stall_execution(uint32_t microseconds) 632f11c7f63SJim Harris { 633f11c7f63SJim Harris 634f11c7f63SJim Harris DELAY(microseconds); 635f11c7f63SJim Harris } 636f11c7f63SJim Harris 637f11c7f63SJim Harris /** 638f11c7f63SJim Harris * @brief In this method the user must return the base address register (BAR) 639f11c7f63SJim Harris * value for the supplied base address register number. 640f11c7f63SJim Harris * 641f11c7f63SJim Harris * @param[in] controller The controller for which to retrieve the bar number. 642f11c7f63SJim Harris * @param[in] bar_number This parameter depicts the BAR index/number to be read. 643f11c7f63SJim Harris * 644f11c7f63SJim Harris * @return Return a pointer value indicating the contents of the BAR. 645f11c7f63SJim Harris * @retval NULL indicates an invalid BAR index/number was specified. 646f11c7f63SJim Harris * @retval All other values indicate a valid VIRTUAL address from the BAR. 647f11c7f63SJim Harris */ 648f11c7f63SJim Harris void * 649f11c7f63SJim Harris scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 650f11c7f63SJim Harris uint16_t bar_number) 651f11c7f63SJim Harris { 652f11c7f63SJim Harris 653f11c7f63SJim Harris return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 654f11c7f63SJim Harris } 655f11c7f63SJim Harris 656f11c7f63SJim Harris /** 657f11c7f63SJim Harris * @brief This method informs the SCI Core user that a phy/link became 658f11c7f63SJim Harris * ready, but the phy is not allowed in the port. In some 659f11c7f63SJim Harris * situations the underlying hardware only allows for certain phy 660f11c7f63SJim Harris * to port mappings. If these mappings are violated, then this 661f11c7f63SJim Harris * API is invoked. 662f11c7f63SJim Harris * 663f11c7f63SJim Harris * @param[in] controller This parameter represents the controller which 664f11c7f63SJim Harris * contains the port. 665f11c7f63SJim Harris * @param[in] port This parameter specifies the SCI port object for which 666f11c7f63SJim Harris * the callback is being invoked. 667f11c7f63SJim Harris * @param[in] phy This parameter specifies the phy that came ready, but the 668f11c7f63SJim Harris * phy can't be a valid member of the port. 669f11c7f63SJim Harris * 670f11c7f63SJim Harris * @return none 671f11c7f63SJim Harris */ 672f11c7f63SJim Harris void 673f11c7f63SJim Harris scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 674f11c7f63SJim Harris SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 675f11c7f63SJim Harris { 676f11c7f63SJim Harris 677f11c7f63SJim Harris } 678