Home
last modified time | relevance | path

Searched +full:controller +full:- +full:dependent (Results 1 – 25 of 209) sorted by relevance

123456789

/linux/Documentation/devicetree/bindings/display/
H A Dsolomon,ssd-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/solomon,ssd-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Javier Martinez Canillas <javierm@redhat.com>
16 reset-gpios:
20 dc-gpios:
22 GPIO connected to the controller's D/C# (Data/Command) pin,
23 that is needed for 4-wire SPI to tell the controller if the
30 Height in pixel of the screen driven by the controller.
[all …]
H A Dsolomon,ssd1307fb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Solomon SSD1307 OLED Controller Framebuffer
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC PCIe RP/EP controller
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
14 Generic Synopsys DesignWare PCIe Root Port and Endpoint controller
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
[all …]
/linux/Documentation/devicetree/bindings/dma/stm32/
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA Controller
10 The STM32 DMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
18 dependent:
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dchipidea,usb2-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller Common Properties
10 - Xu Yang <xu.yang_2@nxp.com>
25 clock-names:
31 power-domains:
37 reset-names:
40 "#reset-cells":
[all …]
/linux/Documentation/driver-api/memory-devices/
H A Dti-emif.rst1 .. SPDX-License-Identifier: GPL-2.0
4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
32 functions of the driver includes re-configuring AC timing
38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
42 - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
43 - Custom configurations: customizable policy options through
45 - IP revision
46 - PHY type
[all …]
H A Dti-gpmc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
14 * Pseudo-SRAM devices
85 4. read async non-muxed
107 6. read sync non-muxed
131 8. write async non-muxed
157 10. write sync non-muxed
172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc timings, a reason that
/linux/drivers/net/dsa/
H A Dvitesse-vsc73xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 * struct vsc73xx_portinfo - port data structure: contains storage data
34 * struct vsc73xx - VSC73xx state container: main data structure
38 * @gc: Main structure of the GPIO controller
42 * @ops: Structure with hardware-dependent operations
65 * struct vsc73xx_ops - VSC73xx methods container
66 * @read: Method for register reading over the hardware-dependent interface
67 * @write: Method for register writing over the hardware-dependent interface
77 * struct vsc73xx_bridge_vlan - VSC73xx driver structure which keeps vlan
/linux/drivers/media/platform/microchip/
H A Dmicrochip-isc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Microchip Image Sensor Controller (ISC) driver header file
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
13 #include <linux/clk-provider.h>
16 #include <media/v4l2-ctrls.h>
17 #include <media/v4l2-device.h>
18 #include <media/videobuf2-dma-contig.h>
57 * struct isc_format - ISC media bus format information
98 * struct fmt_config - ISC format configuration and internal pipeline
164 * struct isc_reg_offsets - ISC device register offsets
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Dst,stih407-powerdown.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@st.com>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip peripheral controllers such as USB and SATA, using
16 registers. These have been grouped together into a single reset controller
19 The actual action taken when powerdown is asserted is hardware dependent.
[all …]
H A Dst,stih407-picophyreset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller
10 - Peter Griffin <peter.griffin@linaro.org>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
17 The actual action taken when softreset is asserted is hardware dependent.
24 const: st,stih407-picophyreset
[all …]
H A Dst,sti-softreset.txt1 STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller
4 This binding describes a reset controller device that is used to enable and
5 disable on-chip peripheral controllers such as USB and SATA, using
9 The actual action taken when softreset is asserted is hardware dependent.
15 controller binding usage.
18 - compatible: Should be "st,stih407-softreset";
19 - #reset-cells: 1, see below
23 softreset: softreset-controller {
24 #reset-cells = <1>;
25 compatible = "st,stih407-softreset";
[all …]
H A Dimg,pistachio-reset.txt1 Pistachio Reset Controller
4 This binding describes a reset controller device that is used to enable and
8 The actual action taken when soft reset is asserted is hardware dependent.
14 for common reset controller binding usage.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
[all …]
/linux/drivers/staging/media/deprecated/atmel/
H A Datmel-isc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Microchip Image Sensor Controller (ISC) driver header file
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
13 #include <linux/clk-provider.h>
16 #include <media/v4l2-ctrls.h>
17 #include <media/v4l2-device.h>
18 #include <media/videobuf2-dma-contig.h>
57 * struct isc_format - ISC media bus format information
97 * struct fmt_config - ISC format configuration and internal pipeline
163 * struct isc_reg_offsets - ISC device register offsets
[all …]
/linux/Documentation/infiniband/
H A Dopa_vnic.rst2 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC)
5 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC) feature
6 supports Ethernet functionality over Omni-Path fabric by encapsulating
11 The patterns of exchanges of Omni-Path encapsulated Ethernet packets
12 involves one or more virtual Ethernet switches overlaid on the Omni-Path
13 fabric topology. A subset of HFI nodes on the Omni-Path fabric are
26 +-------------------+
30 +-------------------+
35 +-----------------------------+ +------------------------------+
37 | +---------+ +---------+ | | +---------+ +---------+ |
[all …]
/linux/arch/powerpc/include/asm/
H A Ddbdma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Definitions for using the Apple Descriptor-Based DMA controller
13 * DBDMA control/status registers. All little-endian.
43 * DBDMA command structure. These fields are all little-endian!
47 __le16 command; /* command word (has bit-fields) */
49 __le32 cmd_dep; /* command-dependent field */
67 #define KEY_STREAM2 0x200 /* device-dependent stream */
68 #define KEY_STREAM3 0x300 /* device-dependent stream */
70 #define KEY_SYSTEM 0x600 /* system memory-mapped space */
71 #define KEY_DEVICE 0x700 /* device memory-mapped space */
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Daspeed,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ASPEED SD/SDIO/MMC Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Ryan Chen <ryanchen.aspeed@gmail.com>
15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO
20 the slots are dependent on the common configuration area, they are described
26 - aspeed,ast2400-sd-controller
27 - aspeed,ast2500-sd-controller
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dsocionext,uniphier-mio-dmac.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier Media IO DMA controller
14 - Masahiro Yamada <yamada.masahiro@socionext.com>
17 - $ref: dma-controller.yaml#
21 const: socionext,uniphier-mio-dmac
29 The number of interrupt lines is SoC-dependent.
37 '#dma-cells':
[all …]
/linux/drivers/pinctrl/intel/
H A Dpinctrl-intel.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
38 * struct intel_function - Description about a function
48 * struct intel_padgroup - Hardware pad group information
67 * enum - Special treatment for GPIO base in pad group
74 INTEL_GPIO_BASE_ZERO = -2,
75 INTEL_GPIO_BASE_NOMAP = -1,
80 * struct intel_community - Intel pin community description
98 * @gpps: Pad groups if the controller has variable size pad groups
100 * @pad_map: Optional non-linear mapping of the pads
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
14 uniquely in a device dependent manner. The nodes for an i2c bus
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
24 pattern: '^(i2c-?)?mux'
26 '#address-cells':
[all …]
/linux/arch/arm/mm/
H A Dl2c-l2x0-resume.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * L2C-310 early resume code. This can be used by platforms to restore
4 * the settings of their L2 cache controller before restoring the
11 #include <asm/hardware/cache-l2x0.h>
21 @ r1 = phys address of L2C-310 controller
34 @ The prefetch and power control registers are revision dependent
60 1: .long l2x0_saved_regs - .
/linux/Documentation/admin-guide/pm/
H A Dsuspend-flows.rst1 .. SPDX-License-Identifier: GPL-2.0
12 At least one global system-wide transition needs to be carried out for the
14 :doc:`sleep states <sleep-states>`. Hibernation requires more than one
16 referred to as *system-wide suspend* (or simply *system suspend*) states, need
27 significant differences between the :ref:`suspend-to-idle <s2idle>` code flows
28 and the code flows related to the :ref:`suspend-to-RAM <s2ram>` and
31 The :ref:`suspend-to-RAM <s2ram>` and :ref:`standby <standby>` sleep states
33 boils down to the platform-specific actions carried out by the suspend and
37 *platform-dependent suspend* states in what follows.
42 Suspend-to-idle Suspend Code Flow
[all …]
/linux/include/linux/bus/
H A Dstm32_firewall_device.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
19 * struct stm32_firewall - Information on a device's firewall. Each device can have more than one
22 * @firewall_ctrl: Pointer referencing a firewall controller of the device. It is
23 * opaque so a device cannot manipulate the controller's ops or access
24 * the controller's data
25 * @extra_args: Extra arguments that are implementation dependent
28 * @firewall_id: Firewall ID associated the device for this firewall controller
40 * stm32_firewall_get_firewall - Get the firewall(s) associated to given device.
41 * The firewall controller reference is always the first argument
[all …]
/linux/Documentation/devicetree/bindings/soc/loongson/
H A Dloongson,ls2k-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsti-dwmac.txt1 STMicroelectronics SoC DWMAC glue layer controller
10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
23 retimeing tx lines. This is totally board dependent and can take one of the
26 - sti-ethclk: this is the phy clock.
[all …]

123456789