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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00config.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
24 struct rt2x00intf_conf conf; in rt2x00lib_config_intf() local
27 conf.type = type; in rt2x00lib_config_intf()
31 conf.sync = TSF_SYNC_ADHOC; in rt2x00lib_config_intf()
35 conf.sync = TSF_SYNC_AP_NONE; in rt2x00lib_config_intf()
38 conf.sync = TSF_SYNC_INFRA; in rt2x00lib_config_intf()
41 conf.sync = TSF_SYNC_NONE; in rt2x00lib_config_intf()
51 memset(conf.mac, 0, sizeof(conf.mac)); in rt2x00lib_config_intf()
53 memcpy(conf.mac, mac, ETH_ALEN); in rt2x00lib_config_intf()
[all …]
/linux/drivers/isdn/mISDN/
H A Ddsp_cmx.c20 * There are 3 different solutions: -1 = software, 0 = hardware-crossconnect
21 * 1-n = hardware-conference. The n will give the conference number.
39 * - Crossconnecting or even conference, if more than two members are together.
40 * - Force mixing of transmit data with other crossconnect/conference members.
41 * - Echo generation to benchmark the delay of audio processing.
42 * - Use hardware to minimize cpu load, disable FIFO load and minimize delay.
43 * - Dejittering and clock generation.
48 * RX-Buffer
51 * ----------------+-------------+-------------------
53 * The rx-buffer is a ring buffer used to store the received data for each
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H A Ddsp_core.c12 * Real-time tone generation
14 * Real-time cross-connection and conferrence
23 * The dsp module provides layer 2 for b-channels (64kbit). It provides
26 * - (1) generation of tones
27 * - (2) detection of dtmf tones
28 * - (3) crossconnecting and conferences (clocking)
29 * - (4) echo generation for delay test
30 * - (5) volume control
31 * - (6) disable receive data
32 * - (7) pipeline
[all …]
/linux/drivers/net/wireless/ti/wlcore/
H A Dacx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2009 Nokia Corporation
33 ret = -ENOMEM; in wl1271_acx_wake_up_conditions()
37 wake_up->role_id = wlvif->role_id; in wl1271_acx_wake_up_conditions()
38 wake_up->wake_up_event = wake_up_event; in wl1271_acx_wake_up_conditions()
39 wake_up->listen_interval = listen_interval; in wl1271_acx_wake_up_conditions()
62 ret = -ENOMEM; in wl1271_acx_sleep_auth()
66 auth->sleep_auth = sleep_auth; in wl1271_acx_sleep_auth()
75 wl->sleep_auth = sleep_auth; in wl1271_acx_sleep_auth()
91 return -EINVAL; in wl1271_acx_tx_power()
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_cn9k.c1 // SPDX-License-Identifier: GPL-2.0
19 struct device *dev = &oct->pdev->dev; in cn93_vf_dump_q_regs()
21 dev_info(dev, "IQ-%d register dump\n", qno); in cn93_vf_dump_q_regs()
50 dev_info(dev, "OQ-%d register dump\n", qno); in cn93_vf_dump_q_regs()
85 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no); in cn93_vf_reset_iq()
105 /* Reset Hardware Rx queue */
110 /* Disable Output (Rx) Ring */ in cn93_vf_reset_oq()
121 /* Reset all hardware Tx/Rx queues */
124 struct pci_dev *pdev = oct->pdev; in octep_vf_reset_io_queues_cn93()
127 dev_dbg(&pdev->dev, "Reset OCTEP_CN93 VF IO Queues\n"); in octep_vf_reset_io_queues_cn93()
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H A Doctep_vf_cnxk.c1 // SPDX-License-Identifier: GPL-2.0
19 struct device *dev = &oct->pdev->dev; in cnxk_vf_dump_q_regs()
21 dev_info(dev, "IQ-%d register dump\n", qno); in cnxk_vf_dump_q_regs()
50 dev_info(dev, "OQ-%d register dump\n", qno); in cnxk_vf_dump_q_regs()
88 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no); in cnxk_vf_reset_iq()
107 /* Reset Hardware Rx queue */
112 /* Disable Output (Rx) Ring */ in cnxk_vf_reset_oq()
123 /* Reset all hardware Tx/Rx queues */
126 struct pci_dev *pdev = oct->pdev; in octep_vf_reset_io_queues_cnxk()
129 dev_dbg(&pdev->dev, "Reset OCTEP_CNXK VF IO Queues\n"); in octep_vf_reset_io_queues_cnxk()
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/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
37 switch-14 {
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H A Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
45 phy-mode = "rgmii-id";
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H A Dzynq-ebaz4205.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 /include/ "zynq-7000.dtsi"
10 compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
28 ps-clk-frequency = <33333333>;
29 fclk-enable = <8>;
34 phy-mode = "mii";
35 phy-handle = <&phy>;
38 assigned-clocks = <&clkc 18>;
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/linux/net/mac80211/
H A Dwep.c1 // SPDX-License-Identifier: GPL-2.0-only
29 get_random_bytes(&local->wep_iv, IEEE80211_WEP_IV_LEN); in ieee80211_wep_init()
51 local->wep_iv++; in ieee80211_wep_get_iv()
52 if (ieee80211_wep_weak_iv(local->wep_iv, keylen)) in ieee80211_wep_get_iv()
53 local->wep_iv += 0x0100; in ieee80211_wep_get_iv()
58 *iv++ = (local->wep_iv >> 16) & 0xff; in ieee80211_wep_get_iv()
59 *iv++ = (local->wep_iv >> 8) & 0xff; in ieee80211_wep_get_iv()
60 *iv++ = local->wep_iv & 0xff; in ieee80211_wep_get_iv()
69 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; in ieee80211_wep_add_iv()
74 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED); in ieee80211_wep_add_iv()
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H A Dkey.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2002-2005, Instant802 Networks, Inc.
4 * Copyright 2005-2006, Devicescape Software, Inc.
5 * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz>
6 * Copyright 2007-2008 Johannes Berg <johannes@sipsolutions.net>
7 * Copyright 2013-2014 Intel Mobile Communications GmbH
8 * Copyright 2015-2017 Intel Deutschland GmbH
9 * Copyright 2018-2020, 2022-2025 Intel Corporation
23 #include "driver-ops.h"
34 * Key handling in mac80211 is done based on per-interface (sub_if_data)
[all …]
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2002-2005, Instant802 Networks, Inc.
4 * Copyright 2005-2006, Devicescape Software, Inc.
5 * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz>
6 * Copyright 2013-2014 Intel Mobile Communications GmbH
8 * Copyright (C) 2018-2025 Intel Corporation
30 #include "driver-ops.h"
43 if (atomic_read(&local->iff_allmultis)) in ieee80211_configure_filter()
46 if (local->monitors || test_bit(SCAN_SW_SCANNING, &local->scanning) || in ieee80211_configure_filter()
47 test_bit(SCAN_ONCHANNEL_SCANNING, &local->scanning)) in ieee80211_configure_filter()
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cn9k_pf.c1 // SPDX-License-Identifier: GPL-2.0
19 /* Names of Hardware non-queue generic interrupts */
42 struct device *dev = &oct->pdev->dev; in cn93_dump_regs()
44 dev_info(dev, "IQ-%d register dump\n", qno); in cn93_dump_regs()
73 dev_info(dev, "OQ-%d register dump\n", qno); in cn93_dump_regs()
109 struct octep_config *conf = oct->conf; in cn93_reset_iq() local
112 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no); in cn93_reset_iq()
115 q_no += conf->pf_ring_cfg.srn; in cn93_reset_iq()
134 /* Reset Hardware Rx queue */
139 q_no += CFG_GET_PORTS_PF_SRN(oct->conf); in cn93_reset_oq()
[all …]
H A Doctep_cnxk_pf.c1 // SPDX-License-Identifier: GPL-2.0
20 /* Names of Hardware non-queue generic interrupts */
62 struct device *dev = &oct->pdev->dev; in cnxk_dump_regs()
64 dev_info(dev, "IQ-%d register dump\n", qno); in cnxk_dump_regs()
93 dev_info(dev, "OQ-%d register dump\n", qno); in cnxk_dump_regs()
129 struct octep_config *conf = oct->conf; in cnxk_reset_iq() local
132 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no); in cnxk_reset_iq()
135 q_no += conf->pf_ring_cfg.srn; in cnxk_reset_iq()
154 /* Reset Hardware Rx queue */
159 q_no += CFG_GET_PORTS_PF_SRN(oct->conf); in cnxk_reset_oq()
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H A Doctep_main.c1 // SPDX-License-Identifier: GPL-2.0
42 * octep_alloc_ioq_vectors() - Allocate Tx/Rx Queue interrupt info.
46 * Allocate resources to hold per Tx/Rx queue interrupt info.
48 * is scheduled and includes quick access to private data of Tx/Rx queue
52 * -1, if failed to allocate any resource.
59 for (i = 0; i < oct->num_oqs; i++) { in octep_alloc_ioq_vectors()
60 oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i])); in octep_alloc_ioq_vectors()
61 if (!oct->ioq_vector[i]) in octep_alloc_ioq_vectors()
64 ioq_vector = oct->ioq_vector[i]; in octep_alloc_ioq_vectors()
65 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors()
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/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
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H A Dzynqmp-zc1751-xm019-dc5.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm019-dc5 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
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/linux/drivers/spi/
H A Dspi-meson-spicc.c7 * SPDX-License-Identifier: GPL-2.0+
12 #include <linux/clk-provider.h>
24 #include <linux/dma-mapping.h>
36 * For RX, when the number of words in RXFIFO is greater than the preset
38 * preset number of words from RXFIFO, then write them into RX buffer.
40 * - 64 bits per word
41 * - The transfer length in word must be multiples of the dma_burst_len, and
77 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */
79 #define SPICC_RR_EN BIT(3) /* RX FIFO Ready Interrupt */
80 #define SPICC_RH_EN BIT(4) /* RX FIFO Half-Full Interrupt */
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H A Dspi-ep93xx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Mika Westerberg
7 * Explicit FIFO handling code was inspired by amba-pl022 driver.
9 * Chip select support using other than built-in GPIOs by H. Hartley Sweeten.
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
65 /* maximum depth of RX/TX FIFO */
69 * struct ep93xx_spi - EP93xx SPI controller structure
74 * @rx: current byte in transfer to receive
75 * @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
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/linux/drivers/net/wireless/ti/wl18xx/
H A Ddebugfs.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2012 Texas Instruments
83 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_beacon_early_term, "%u");
84 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_out_of_mpdu_nodes, "%u");
85 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_hdr_overflow, "%u");
86 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_dropped_frame, "%u");
87 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_done, "%u");
88 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag, "%u");
89 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag_end, "%u");
90 WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_cmplt, "%u");
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H A Dacx.c1 // SPDX-License-Identifier: GPL-2.0-only
28 ret = -ENOMEM; in wl18xx_acx_host_if_cfg_bitmap()
32 bitmap_conf->host_cfg_bitmap = cpu_to_le32(host_cfg_bitmap); in wl18xx_acx_host_if_cfg_bitmap()
33 bitmap_conf->host_sdio_block_size = cpu_to_le32(sdio_blk_size); in wl18xx_acx_host_if_cfg_bitmap()
34 bitmap_conf->extra_mem_blocks = cpu_to_le32(extra_mem_blks); in wl18xx_acx_host_if_cfg_bitmap()
35 bitmap_conf->length_field_size = cpu_to_le32(len_field_size); in wl18xx_acx_host_if_cfg_bitmap()
59 ret = -ENOMEM; in wl18xx_acx_set_checksum_state()
63 acx->checksum_state = CHECKSUM_OFFLOAD_ENABLED; in wl18xx_acx_set_checksum_state()
85 ret = -ENOMEM; in wl18xx_acx_clear_statistics()
110 ret = -ENOMEM; in wl18xx_acx_peer_ht_operation_mode()
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
[all …]
/linux/tools/testing/selftests/drivers/net/microchip/
H A Dksz9477_qos.sh2 # SPDX-License-Identifier: GPL-2.0
36 sysctl_set net.ipv6.conf.${h1}.disable_ipv6 1
38 h1_mac=$(ip -j link show dev ${h1} | jq -e '.[].address')
43 sysctl_restore net.ipv6.conf.${h1}.disable_ipv6
50 sysctl_set net.ipv6.conf.${h2}.disable_ipv6 1
51 h2_mac=$(ip -j link show dev ${h2} | jq -e '.[].address')
56 sysctl_restore net.ipv6.conf.${h2}.disable_ipv6
64 sysctl_set net.ipv6.conf.${swp1}.disable_ipv6 1
65 sysctl_set net.ipv6.conf.${swp2}.disable_ipv6 1
72 sysctl_set net.ipv6.conf.br0.disable_ipv6 1
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/linux/drivers/net/wireless/ti/wl1251/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2009 Nokia Corporation
26 #include "rx.h"
34 wl->if_ops->enable_irq(wl); in wl1251_enable_interrupts()
39 wl->if_ops->disable_irq(wl); in wl1251_disable_interrupts()
44 return wl->if_ops->power(wl, false); in wl1251_power_off()
49 return wl->if_ops->power(wl, true); in wl1251_power_on()
55 struct device *dev = wiphy_dev(wl->hw->wiphy); in wl1251_fetch_firmware()
65 if (fw->size % 4) { in wl1251_fetch_firmware()
67 fw->size); in wl1251_fetch_firmware()
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/linux/drivers/net/ethernet/freescale/dpaa/
H A Ddpaa_eth.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
3 * Copyright 2008 - 2016 Freescale Semiconductor Inc.
22 /* More detailed FQ types - used for fine-grained WQ assignments */
24 FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
25 FQ_TYPE_RX_ERROR, /* Rx Error FQs */
26 FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */
28 FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */
29 FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */
30 FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */
86 /* Counters for QMan ERN frames - one counter per rejection code */
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