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/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra20-ac97.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-ac97
23 reset-names:
35 dma-names:
37 - const: rx
[all …]
H A Dcirrus,cs4271.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus Logic CS4271 audio CODEC
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
14 The CS4271 is a stereo audio codec. This device supports both the I2C
18 - $ref: dai-common.yaml#
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
28 spi-cpha: true
[all …]
H A Dinfineon,peb2466.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Infineon PEB2466 codec
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
[all …]
H A Dti,tlv320aic3x.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320AIC3x Codec
11 TLV320AIC3x are a series of low-power stereo audio codecs with stereo
13 single-ended or fully differential configurations.
16 data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.
20 CODEC output pins:
29 CODEC input pins for TLV320AIC3104:
35 CODEC input pins for other compatible codecs:
[all …]
H A Drockchip,rk3308-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,rk3308-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3308 Internal Codec
10 This is the audio codec embedded in the Rockchip RK3308
11 SoC. It has 8 24-bit ADCs and 2 24-bit DACs. The maximum supported
17 The RK3308 audio codec has 8 independent capture channels, but some
19 * grp 0 -- MIC1 / MIC2
20 * grp 1 -- MIC3 / MIC4
[all …]
H A Dcs42l52.txt1 CS42L52 audio CODEC
5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
[all …]
H A Dqcom,wcd9335.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm WCD9335 Audio Codec
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built
27 clock-names:
29 - const: mclk
30 - const: slimbus
35 interrupt-names:
[all …]
H A Dti,tlv320adc3xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
18 - $ref: dai-common.yaml#
23 - ti,tlv320adc3001
24 - ti,tlv320adc3101
30 '#sound-dai-cells':
33 '#gpio-cells':
36 gpio-controller: true
[all …]
H A Dti,tlv320dac3100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments - tlv320aic31xx Codec module
10 - Shenghao Ding <shenghao-ding@ti.com>
13 CODEC output pins:
21 CODEC input pins:
28 The pins can be used in referring sound node's audio-routing property.
33 - ti,tlv320aic310x # - Generic TLV320AIC31xx with mono speaker amp
34 - ti,tlv320aic311x # - Generic TLV320AIC31xx with stereo speaker amp
[all …]
H A Dcs35l32.txt1 CS35L32 audio CODEC
5 - compatible : "cirrus,cs35l32"
7 - reg : the I2C address of the device for I2C. Address is determined by the level
10 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
16 deasserted before communication to the codec starts.
18 - cirrus,boost-manager : Boost voltage control.
19 0 = Automatically managed. Boost-converter output voltage is the higher
21 1 = Automatically managed irrespective of audio, adapting for low-power
22 dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode
[all …]
H A Drealtek,rt5677.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RT5677 audio CODEC
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
30 - $ref: dai-common.yaml#
42 gpio-controller: true
44 '#gpio-cells':
47 realtek,pow-ldo2-gpio:
49 description: CODEC's POW_LDO2 pin.
[all …]
H A Dst,sta32x.txt1 STA32X audio CODEC
7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
10 deasserted before communication to the codec starts.
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
13 it will be deasserted before communication to the codec
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,lcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Clock & Reset Controller
10 - Bjorn Andersson <andersson@kernel.org>
15 - qcom,lcc-apq8064
16 - qcom,lcc-ipq8064
17 - qcom,lcc-mdm9615
18 - qcom,lcc-msm8960
23 clock-names:
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dlantiq,pef2256.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
20 - const: lantiq,pef2256
27 - description: Master Clock
28 - description: System Clock Receive
29 - description: System Clock Transmit
31 clock-names:
33 - const: mclk
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dallwinner,sun8i-a23-prcm.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun8i-a23-prcm
23 "^.*(clk|rst|codec).*$":
30 - fixed-factor-clock
31 - allwinner,sun8i-a23-apb0-clk
[all …]
/linux/sound/soc/codecs/
H A Dcs4271.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * CS4271 ASoC codec driver
7 * This driver support CS4271 codec being master or slave, working
9 * The data format accepted is I2S or left-justified.
130 * Default CS4271 power-up configuration
131 * Array contains non-existing in hw register at address 0
132 * Array do not include Chip ID, as codec driver does not use
159 /* Current sample rate for de-emphasis control */
161 /* GPIO driving Reset pin, if any */
162 struct gpio_desc *reset; member
[all …]
/linux/sound/hda/codecs/side-codecs/
H A Dtas2781_hda_spi.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright 2024 - 2025 Texas Instruments, Inc.
32 #include <sound/tas2781-tlv.h>
48 /* System Reset Check Register */
73 .reg_shift = -1,
100 dev_err(tas_priv->dev, "%s, E=%d\n", __func__, ret); in tasdevice_spi_dev_read()
126 dev_err(tas_priv->dev, "%s, E=%d\n", __func__, ret); in tasdevice_spi_dev_bulk_read()
143 dev_err(tas_priv->dev, "%s, E=%d\n", __func__, ret); in tasdevice_spi_dev_update_bits()
150 dev_err(tas_priv->dev, "%s, E=%d\n", __func__, ret); in tasdevice_spi_dev_update_bits()
160 if (chn == p->index) { in tasdevice_spi_change_chn_book()
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
14 Smart CODEC and Amp devices. It allows the connection of most Cirrus
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
[all …]
/linux/sound/hda/core/
H A Dcontroller.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio controller helpers
19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
29 for (timeout = 1000; timeout > 0; timeout- in azx_clear_corbrp()
771 snd_hdac_bus_link_power(struct hdac_device * codec,bool enable) snd_hdac_bus_link_power() argument
[all...]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-kii-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb-p20x.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
18 spdif_dit: audio-codec-0 {
19 #sound-dai-cells = <0>;
[all …]
H A Dmeson-axg-s400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-axg.dtsi"
9 #include <dt-bindings/input/input.h>
12 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-next {
[all …]
/linux/sound/soc/tegra/
H A Dtegra20_ac97.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_ac97.c - Tegra20 AC97 platform driver
22 #include <linux/reset.h>
32 #define DRV_NAME "tegra20-ac97"
42 * The reset line is not driven by DAC pad group, have to toggle GPIO. in tegra20_ac97_codec_reset()
43 * The RESET line is active low but this is abstracted by the GPIO in tegra20_ac97_codec_reset()
46 gpiod_set_value(workdata->reset_gpio, 1); in tegra20_ac97_codec_reset()
49 gpiod_set_value(workdata->reset_gpio, 0); in tegra20_ac97_codec_reset()
55 regmap_read(workdata->regmap, TEGRA20_AC97_STATUS1, &readback); in tegra20_ac97_codec_reset()
68 * although sync line is driven by the DAC pad group warm reset using in tegra20_ac97_codec_warm_reset()
[all …]
/linux/include/sound/
H A Dhda_codec.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Universal Interface for Intel High Definition Audio Codec
33 * codec bus
52 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
53 /* status for codec/controller */
55 unsigned int response_reset:1; /* controller was reset */
95 hda_codec_to_driver(codec) global() argument
172 struct hda_codec *codec; global() member
325 snd_hda_codec_read(struct hda_codec * codec,hda_nid_t nid,int flags,unsigned int verb,unsigned int parm) snd_hda_codec_read() argument
333 snd_hda_codec_write(struct hda_codec * codec,hda_nid_t nid,int flags,unsigned int verb,unsigned int parm) snd_hda_codec_write() argument
339 snd_hda_param_read(codec,nid,param) global() argument
341 snd_hda_get_sub_nodes(codec,nid,start_nid) global() argument
346 snd_hda_get_num_conns(struct hda_codec * codec,hda_nid_t nid) snd_hda_get_num_conns() argument
351 snd_hda_get_raw_connections(codec,nid,list,max_conns) global() argument
353 snd_hda_get_num_raw_conns(codec,nid) global() argument
379 snd_hda_codec_write_cache(struct hda_codec * codec,hda_nid_t nid,int flags,unsigned int verb,unsigned int parm) snd_hda_codec_write_cache() argument
448 snd_hda_codec_cleanup_stream(codec,nid) global() argument
451 snd_hda_query_supported_pcm(codec,nid,ratesp,fmtsp,subfmtp,bpsp) global() argument
453 snd_hda_is_supported_format(codec,nid,fmt) global() argument
481 hda_call_check_power_status(struct hda_codec * codec,hda_nid_t nid) hda_call_check_power_status() argument
493 snd_hda_power_up(codec) global() argument
494 snd_hda_power_up_pm(codec) global() argument
495 snd_hda_power_down(codec) global() argument
496 snd_hda_power_down_pm(codec) global() argument
501 hda_codec_need_resume(struct hda_codec * codec) hda_codec_need_resume() argument
522 snd_hda_codec_load_dsp_prepare(struct hda_codec * codec,unsigned int format,unsigned int size,struct snd_dma_buffer * bufp) snd_hda_codec_load_dsp_prepare() argument
529 snd_hda_codec_load_dsp_trigger(struct hda_codec * codec,bool start) snd_hda_codec_load_dsp_trigger() argument
531 snd_hda_codec_load_dsp_cleanup(struct hda_codec * codec,struct snd_dma_buffer * dmab) snd_hda_codec_load_dsp_cleanup() argument
[all...]
/linux/sound/pcmcia/vx/
H A Dvxp_ops.c1 // SPDX-License-Identifier: GPL-2.0-or-later
41 return chip->port + vxp_reg_offset[reg]; in vxp_reg_addr()
45 * snd_vx_inb - read a byte from the register
54 * snd_vx_outb - write a byte on the register
73 * vx_check_magic - check the magic word on xilinx
87 dev_err(chip->car in vx_check_magic()
436 vxp_write_codec_reg(struct vx_core * chip,int codec,unsigned int data) vxp_write_codec_reg() argument
[all...]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-corsola-squirtle.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola-voltorb.dtsi"
12 chassis-type = "convertible";
19 interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&touchscreen_pins>;
22 reset-gpios = <&pio 60 GPIO_ACTIVE_LOW>;
23 vcc33-supply = <&pp3300_s3>;
24 status = "fail-needs-probe";
[all …]

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