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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dst-rproc.txt1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and "pwr_reset"
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H A Dimx-rproc.txt1 NXP iMX6SX/iMX7D Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for ARM Cortex M4 Co-processor found on some
8 - compatible Should be one of:
9 "fsl,imx7d-cm4"
10 "fsl,imx6sx-cm4"
11 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
12 - syscon Phandle to syscon block which provide access to
16 - memory-region list of phandels to the reserved memory regions.
17 (See: ../reserved-memory/reserved-memory.txt)
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H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schema
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H A Dmtk,scp.txt2 ----------------------------------------
4 This binding provides support for ARM Cortex M4 Co-processor found on some
8 - compatible Should be "mediatek,mt8183-scp"
9 - reg Should contain the address ranges for memory regions:
11 - reg-names Contains the corresponding names for the memory regions:
13 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
14 - clock-names Contains the corresponding name for the clock. This
18 --------
22 for the rpmsg devices - but must contain the following property:
24 - mtk,rpmsg-name Contains the name for the rpmsg device. Used to match
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H A Dmtk,scp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tingha
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H A Dwkup_m3_rproc.txt4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
6 that cannot be controlled from the MPU. This CM3 processor requires a firmware
12 A wkup_m3 device node is used to represent the Wakeup M3 processor instance
17 --------------------
18 - compatible: Should be one of,
19 "ti,am3352-wkup-m3" for AM33xx SoCs
20 "ti,am4372-wkup-m3" for AM43xx SoCs
21 - reg: Should contain the address ranges for the two internal
25 - reg-names: Contains the corresponding names for the two memory
27 - ti,hwmods: Name of the hwmod associated with the wkupm3 device.
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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/
H A Dother.json45 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
95 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d…
145 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
200 "BriefDescription": "Read-write data cache collisions"
255 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
260 "BriefDescription": "L3 CO received retry port 3 (memory only), every retry counted"
270 "BriefDescription": "L3 CO to memory port 0 with or without data"
280-word boundary, which causes it to require an additional slice than than what normally would be re…
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/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dapple,mailbox.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
11 - Sven Peter <sven@svenpeter.dev>
15 messages between the main CPU and a co-processor. Multiple instances
17 One of the two FIFOs is used to send data to a co-processor while the other
25 - description:
30 - enum:
31 - apple,t8103-asc-mailbox
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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A Dother.json11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
113 …to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that re…
161 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
167 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
197 …ional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set thi…
203 …ional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set thi…
215 …t used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch …
221 …t used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch …
257 "BriefDescription": "Completion stall due to CO q full",
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/freebsd/sys/arm/arm/
H A Ddisassem.c3 /*-
4 * SPDX-License-Identifier: BSD-4-Clause
71 * 2 - print Operand 2 of a data processing instruction
72 * d - destination register (bits 12-15)
73 * n - n register (bits 16-19)
74 * s - s register (bits 8-11)
75 * o - indirect register rn (bits 16-19) (used by swap)
76 * m - m register (bits 0-3)
77 * a - address operand of ldr/str instruction
78 * l - register list for ldm/stm instruction
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2024-09-20 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
49 7a19 PCI-to-PCI Bridge
53 7a29 PCI-to-PCI Bridge
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/freebsd/sys/contrib/device-tree/Bindings/nvme/
H A Dapple,nvme-ans.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
19 - const: apple,nvme-ans2
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/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dnvidia,tegra210-bpmp.txt1 NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
3 The Boot and Power Management Processor (BPMP) is a co-processor found
12 - compatible
15 - "nvidia,tegra210-bpmp"
16 - reg: physical base address and length for HW synchornization primitives
19 - interrupts: specifies the interrupt number for receiving messages ("rx")
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
29 compatible = "nvidia,tegra210-bpmp";
34 interrupt-names = "tx", "rx";
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsABIFlagsSection.h1 //===- MipsABIFlagsSection.h - Mips ELF ABI Flags Section -------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
27 // The level of the ISA: 1-5, 32, 64.
29 // The revision of ISA: 0 for MIPS V and below, 1-n otherwise.
33 // The size of co-processor 1 registers.
35 // The size of co-processor 2 registers.
37 // Processor-specific extension.
47 // The floating-point ABI.
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dwkup_m3_ipc.txt4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
7 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
18 --------------------
19 - compatible: Should be,
20 "ti,am3352-wkup-m3-ipc" for AM33xx SoCs
21 "ti,am4372-wkup-m3-ipc" for AM43xx SoCs
22 - reg: Contains the IPC register address space to communicate
23 with the Wakeup M3 processor
24 - interrupts: Contains the interrupt information for the wkup_m3
26 - ti,rproc: phandle to the wkup_m3 rproc node so the IPC driver
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/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dfsl-dcp.txt1 Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 .
4 - compatible : Should be "fsl,<soc>-dcp"
5 - reg : Should contain MXS DCP registers location and length
6 - interrupts : Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ
9 - clocks : Clock reference (only required on some SOCs: 6ull and 6sll).
10 - clock-names : Must be "dcp".
15 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
H A Dfsl-dcp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28
10 - Marek Vasut <marex@denx.de>
15 - enum:
16 - fsl,imx23-dcp
17 - fsl,imx28-dcp
18 - items:
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/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Drtc-meson-vrtc.txt8 - compatible: should be "amlogic,meson-vrtc"
9 - reg: physical address for the alarm register
12 application processors (AP) and the secure co-processor (SCP.) When
14 program an always-on timer before going sleep. When the timer expires,
20 compatible = "amlogic,meson-vrtc";
H A Damlogic,meson-vrtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/amlogic,meson-vrtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
17 application processors (AP) and the secure co-processor (SCP.) When
19 program an always-on timer before going sleep. When the timer expires,
23 - $ref: rtc.yaml#
28 - amlogic,meson-vrtc
34 - compatible
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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dbrcm,iproc-i2c.txt5 - compatible:
6 Must be "brcm,iproc-i2c" or "brcm,iproc-nic-i2c"
8 - reg:
12 - clock-frequency:
15 - #address-cells:
18 - #size-cells:
23 - interrupts:
29 - brcm,ape-hsls-addr-mask:
30 Required for "brcm,iproc-nic-i2c". Host view of address mask into the
31 'APE' co-processor. Value must be unsigned, 32-bit
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H A Dbrcm,iproc-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
15 - brcm,iproc-i2c
16 - brcm,iproc-nic-i2c
21 clock-frequency:
32 brcm,ape-hsls-addr-mask:
34 description: Host view of address mask into the 'APE' co-processor
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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,coresight-etm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Embedded Trace Macrocell (ETM) is a real-time trace module providing
24 instruction and data tracing of a processor.
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dcsky,mptimer.txt2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
21 - compatible
25 - clocks
29 - interrupts
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dcsky,mpintc.txt2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6 SMP soc, and it also could be used in non-SMP system.
9 0-15 : software irq, and we use 15 as our IPI_IRQ.
10 16-31 : private irq, and we use 16 as the co-processor timer.
11 31-1024: common irq for soc ip.
13 Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
27 - compatible
31 - #interrupt-cells
35 - interrupt-controller:
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/freebsd/sys/contrib/device-tree/Bindings/nds32/
H A Dandestech-boards2 -----------------------------------------------------------------------------
4 is composed of one Andestech(nds32) processor and AE3XX.
7 - compatible = "andestech,ae3xx";
10 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&intc>;
19 -----------------------------------------------------------------------------
21 processors to provide a cost-effective and high performance solution for
28 system environment for early prototyping and software/hardware co-development.
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