| /linux/drivers/crypto/cavium/nitrox/ |
| H A D | nitrox_reqmgr.c | 1 // SPDX-License-Identifier: GPL-2.0
24 * 0x00 - Success
26 * 0x43 - ERR_GC_DATA_LEN_INVALID
28 * less than 16 bytes for AES-XTS and AES-CTS.
29 * 0x45 - ERR_GC_CTX_LEN_INVALID
31 * 0x4F - ERR_GC_DOCSIS_CIPHER_INVALID
33 * AES/DES-CBC mode encryption.
34 * 0x50 - ERR_GC_DOCSIS_OFFSET_INVALID
39 * 0x51 - ERR_GC_CRC32_INVALID_SELECTION
41 * 0x52 - ERR_GC_AES_CCM_FLAG_INVALID
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| /linux/drivers/iommu/arm/arm-smmu-v3/ |
| H A D | arm-smmu-v3.c | 1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/io-pgtable.h>
27 #include <linux/pci-ats.h>
32 #include "arm-smmu-v3.h"
33 #include "../../dma-iommu.h"
38 "Disable MSI-based polling for CMD_SYNC completion.");
81 { ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
82 { ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
95 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options()
97 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options()
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| /linux/include/dt-bindings/gce/ |
| H A D | mt8186-gce.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
82 /* CMDQ: debug */
85 /* CMDQ: P7: debug */
348 /* CMDQ sw tokens
367 /* Notify normal CMDQ there are some secure task done
368 * MUST NOT CHANGE, this token sync with secure world
372 /* CMDQ use sw token */
386 * There are 15 32-bit GPR, 3 GPR form a set
387 * (64-bit for address, 32-bit for value)
388 * MUST NOT CHANGE, these tokens sync with MDP
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | arm,smmu-v3.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
32 interrupt-names:
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| /linux/drivers/net/ethernet/huawei/hinic/ |
| H A D | hinic_hw_cmdq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
78 #define cmdq_to_cmdqs(cmdq) container_of((cmdq) - (cmdq)->cmdq_type, \ argument
79 struct hinic_cmdqs, cmdq[0])
96 BUFDESC_LCMD_LEN = 2, /* 16 bytes - 2(8 byte unit) */
97 BUFDESC_SCMD_LEN = 3, /* 24 bytes - 3(8 byte unit) */
101 CTRL_SECT_LEN = 1, /* 4 bytes (ctrl) - 1(8 byte unit) */
102 CTRL_DIRECT_SECT_LEN = 2, /* 12 bytes (ctrl + rsvd) - 2(8 byte unit) */
120 * hinic_alloc_cmdq_buf - alloc buffer for sending command
124 * Return 0 - Success, negative - Failure
129 struct hinic_hwif *hwif = cmdqs->hwif; in hinic_alloc_cmdq_buf()
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| /linux/drivers/net/ethernet/hisilicon/hns3/hns3_common/ |
| H A D | hclge_comm_cmd.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2021-2021 Hisilicon Limited.
10 dma_addr_t dma = ring->desc_dma_addr; in hclge_comm_cmd_config_regs()
13 if (ring->ring_type == HCLGE_COMM_TYPE_CSQ) { in hclge_comm_cmd_config_regs()
20 reg_val |= ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
29 reg_val = ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
38 hclge_comm_cmd_config_regs(hw, &hw->cmq.csq); in hclge_comm_cmd_init_regs()
39 hclge_comm_cmd_config_regs(hw, &hw->cmq.crq); in hclge_comm_cmd_init_regs()
44 desc->flag = cpu_to_le16(HCLGE_COMM_CMD_FLAG_NO_INTR | in hclge_comm_cmd_reuse_desc()
47 desc->flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_WR); in hclge_comm_cmd_reuse_desc()
[all …]
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| /linux/drivers/infiniband/hw/bnxt_re/ |
| H A D | qplib_rcfw.c | 2 * Broadcom NetXtreme-E RoCE driver.
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
57 * bnxt_qplib_map_rc - map return type based on opcode
95 return -ETIMEDOUT; in bnxt_qplib_map_rc()
100 * bnxt_re_is_fw_stalled - Check firmware health
105 * rcfw->max_timeout, consider firmware as stalled.
109 * -ENODEV if firmware is not responding
114 struct bnxt_qplib_cmdq_ctx *cmdq; in bnxt_re_is_fw_stalled() local
117 crsqe = &rcfw->crsqe_tbl[cookie]; in bnxt_re_is_fw_stalled()
118 cmdq = &rcfw->cmdq; in bnxt_re_is_fw_stalled()
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | fvp-base-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
18 #include "rtsm_ve-motherboard-rs2.dtsi"
22 compatible = "arm,fvp-base-revc", "arm,vexpress";
23 interrupt-parent = <&gic>;
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
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| /linux/drivers/scsi/aacraid/ |
| H A D | comminit.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
59 const unsigned long fibsize = dev->max_fib_size; in aac_alloc_comm()
66 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || in aac_alloc_comm()
67 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || in aac_alloc_comm()
68 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && in aac_alloc_comm()
69 !dev->sa_firmware)) { in aac_alloc_comm()
71 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) in aac_alloc_comm()
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| /linux/drivers/accel/habanalabs/goya/ |
| H A D | goya.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2022 HabanaLabs, Ltd.
23 * - Range registers (When MMU is enabled, DMA RR does NOT protect host)
24 * - MMU
27 * - Range registers (protect the first 512MB)
28 * - MMU (isolation between users)
31 * - Range registers
32 * - Protection bits
44 * - checks DMA pointer
45 * - WREG, MSG_PROT are not allowed.
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| /linux/include/uapi/linux/ |
| H A D | iommufd.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
23 * - ENOTTY: The IOCTL number itself is not supported at all
24 * - E2BIG: The IOCTL number is supported, but the provided structure has
25 * non-zero in a part the kernel does not understand.
26 * - EOPNOTSUPP: The IOCTL number is supported, and the structure is
29 * - EINVAL: Everything about the IOCTL was understood, but a field is not
31 * - ENOENT: An ID or IOVA provided does not exist.
32 * - ENOMEM: Out of memory.
33 * - EOVERFLOW: Mathematics overflowed.
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
|
| /linux/drivers/scsi/ |
| H A D | ncr53c8xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
8 **-----------------------------------------------------------------------------
22 ** Stefan Esser <se@mi.Uni-Koeln.de>
27 **-----------------------------------------------------------------------------
38 ** Support for Fast-20 scsi.
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
46 ** Full support for scsi scripts instructions pre-fetching.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
[all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/dma/fsl-edma.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx95-clock.h"
13 #include "imx95-pinfunc.h"
14 #include "imx95-power.h"
17 interrupt-parent = <&gic>;
[all …]
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| /linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| H A D | hclge_main.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
326 { OUTER_DST_MAC, 48, KEY_OPT_MAC, -1, -1 },
327 { OUTER_SRC_MAC, 48, KEY_OPT_MAC, -1, -1 },
328 { OUTER_VLAN_TAG_FST, 16, KEY_OPT_LE16, -1, -1 },
329 { OUTER_VLAN_TAG_SEC, 16, KEY_OPT_LE16, -1, -1 },
330 { OUTER_ETH_TYPE, 16, KEY_OPT_LE16, -1, -1 },
331 { OUTER_L2_RSV, 16, KEY_OPT_LE16, -1, -1 },
332 { OUTER_IP_TOS, 8, KEY_OPT_U8, -1, -1 },
333 { OUTER_IP_PROTO, 8, KEY_OPT_U8, -1, -1 },
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| /linux/drivers/net/ethernet/hisilicon/hns3/ |
| H A D | hns3_enet.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
54 static int debug = -1;
79 /* hns3_pci_tbl - PCI Device ID Table
387 napi_schedule_irqoff(&tqp_vector->napi); in hns3_irq_handle()
388 tqp_vector->event_cnt++; in hns3_irq_handle()
398 for (i = 0; i < priv->vector_num; i++) { in hns3_nic_uninit_irq()
399 tqp_vectors = &priv->tqp_vector[i]; in hns3_nic_uninit_irq()
401 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED) in hns3_nic_uninit_irq()
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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|