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/freebsd/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dshared-dma-pool.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/shared-dma-pool.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory DMA pool
10 - devicetree-spec@vger.kernel.org
13 - $ref: reserved-memory.yaml
18 - const: shared-dma-pool
25 - const: restricted-dma-pool
30 When using this, the no-map and reusable properties must not
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/freebsd/sys/contrib/device-tree/src/xtensa/
H A Dkc705.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 /include/ "xtfpga-flash-128m.dtsi"
7 compatible = "cdns,xtensa-kc705";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 linux,cma {
23 compatible = "shared-dma-pool";
27 alloc-ranges = <0x00000000 0x20000000>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
11 #include <dt-bindings/leds/common.h>
16 model = "PHYTEC phyCORE-i.MX93";
17 compatible = "phytec,imx93-phycore-som", "fsl,imx93";
19 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
24 linux,cma {
25 compatible = "shared-dma-pool";
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H A Dtqma8xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
14 reg_1v8: regulator-1v8 {
15 compatible = "regulator-fixed";
16 regulator-name = "V_1V8";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
21 reg_3v3: regulator-3v3 {
22 compatible = "regulator-fixed";
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H A Dimx8ulp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
15 stdout-path = &lpuart5;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
28 linux,cma {
29 compatible = "shared-dma-pool";
32 linux,cma-default;
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H A Dimx93-tqma9352.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
11 model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA SOM";
12 compatible = "tq,imx93-tqma9352", "fsl,imx93";
14 reserved-memory {
15 #address-cells = <2>;
16 #size-cells = <2>;
19 linux,cma {
20 compatible = "shared-dma-pool";
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H A Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
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H A Dimx93-14x14-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-14x14-evk", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
24 linux,cma {
25 compatible = "shared-dma-pool";
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H A Dimx8mm-tqma8mqml.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
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H A Dimx8mq-tqma8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MX_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
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H A Dimx93-9x9-qsb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
24 linux,cma {
25 compatible = "shared-dma-pool";
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H A Dimx95-19x19-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
13 compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
21 bt_sco_codec: audio-codec-bt-sco {
22 #sound-dai-cells = <1>;
23 compatible = "linux,bt-sco";
27 stdout-path = &lpuart1;
35 fan0: pwm-fan {
36 compatible = "pwm-fan";
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/freebsd/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k0500-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "loongson-2k0500.dtsi"
11 compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
12 model = "Loongson-2K0500 Reference Board";
21 stdout-path = "serial0:115200n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 linux,cma {
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H A Dloongson-2k2000-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "loongson-2k2000.dtsi"
11 compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
12 model = "Loongson-2K2000 Reference Board";
19 stdout-path = "serial0:115200n8";
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
33 linux,cma {
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H A Dloongson-2k1000-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "loongson-2k1000.dtsi"
11 compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
12 model = "Loongson-2K1000 Reference Board";
19 stdout-path = "serial0:115200n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 linux,cma {
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62a-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023 - 2024 PHYTEC America LLC
7 * https://www.phytec.com/product/phycore-am62a
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
15 model = "PHYTEC phyCORE-AM62Ax";
16 compatible = "phytec,am62a-phycore-som", "ti,am62a7";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
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H A Dk3-am62x-sk-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include "k3-am625.dtsi"
27 stdout-path = "serial2:115200n8";
31 bootph-pre-ram;
37 reserved-memory {
38 #address-cells = <2>;
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H A Dk3-am62a7-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "k3-am62a7.dtsi"
16 compatible = "ti,am62a7-sk", "ti,am62a7";
28 stdout-path = "serial2:115200n8";
38 reserved-memory {
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dallwinner,sun4i-a10-video-engine.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun4i-a10-video-engine
17 - allwinner,sun5i-a13-video-engine
18 - allwinner,sun7i-a20-video-engine
19 - allwinner,sun8i-a33-video-engine
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-ccimx6ulsom.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Digi International's ConnectCore 6UL System-On-Module device tree source
12 reg = <0x80000000 0>; /* will be filled by U-Boot */
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
20 linux,cma {
21 compatible = "shared-dma-pool";
24 linux,cma-default;
30 vref-supply = <&vdda_adc_3v3>;
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H A Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/
H A Dbcm2712.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
18 clock-frequency = <54000000>;
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
21 #address-cells = <1>;
22 #size-cells = <1>;
30 stdout-path = "serial0:115200n8";
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dx1e80100-asus-vivobook-s15.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "x1e80100-pmics.dtsi"
17 compatible = "asus,vivobook-s15", "qcom,x1e80100";
18 chassis-type = "laptop";
20 pmic-glink {
21 compatible = "qcom,x1e80100-pmic-glink",
22 "qcom,sm8550-pmic-glink",
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/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
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