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/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
94 clocks: clock-controller@e0100000 { label
98 clocks = <&xxti>, <&xusbxti>;
125 clocks = <&clocks CLK_PDMA0>;
135 clocks = <&clocks CLK_PDMA1>;
145 clocks = <&clocks CLK_TSADC>;
158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
175 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
190 clocks = <&clocks CLK_KEYIF>;
200 clocks = <&clocks CLK_I2C0>;
[all …]
H A Ds3c64xx.dtsi68 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
69 <&clocks SCLK_MMC0>;
79 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
80 <&clocks SCLK_MMC1>;
90 clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
91 <&clocks SCLK_MMC2>;
101 clocks = <&clocks PCLK_WDT>;
110 clocks = <&clocks PCLK_IIC0>;
123 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
124 <&clocks SCLK_UART>;
[all …]
H A Dexynos5420.dtsi39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
46 clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
53 clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
60 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
67 clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
74 clocks = <&clock CLK_DOUT_ACLK333_G2D>;
81 clocks = <&clock CLK_DOUT_ACLK266_G2D>;
87 clocks = <&clock CLK_DOUT_ACLK266>;
94 clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
101 clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
20 All available clocks are defined as preprocessor macros in
26 # CMU_TOP which generates clocks for
28 # clocks
30 # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP
32 # CMU_MIF which generates clocks for DRAM Memory Controller domain
34 # CMU_PERIC which generates clocks for
37 # CMU_PERIS which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs
39 # CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs
42 # CMU_DISP which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs
[all …]
H A Dsamsung,exynos5260-clock.yaml16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
24 Phy clocks::
25 There are several clocks which are generated by specific PHYs. These clocks
27 These clocks are defined as fixed clocks in the driver with following names::
44 All available clocks are defined as preprocessor macros in
64 clocks:
91 clocks:
102 - clocks
111 clocks:
131 - clocks
[all …]
H A Drenesas,cpg-clocks.yaml4 $id: http://devicetree.org/schemas/clock/renesas,cpg-clocks.yaml#
13 The Clock Pulse Generator (CPG) generates core clocks for the SoC. It
17 the CPG Module Stop (MSTP) Clocks.
22 - const: renesas,r8a73a4-cpg-clocks # R-Mobile APE6
23 - const: renesas,r8a7740-cpg-clocks # R-Mobile A1
24 - const: renesas,r8a7778-cpg-clocks # R-Car M1
25 - const: renesas,r8a7779-cpg-clocks # R-Car H1
28 - renesas,r7s72100-cpg-clocks # RZ/A1H
29 - const: renesas,rz-cpg-clocks # RZ/A1
30 - const: renesas,sh73a0-cpg-clocks # SH-Mobile AG5
[all …]
H A Dsamsung,exynos7-clock.yaml16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
20 All available clocks are defined as preprocessor macros in
38 clocks:
65 clocks:
78 - clocks
87 clocks:
99 - clocks
108 clocks:
117 - clocks
126 clocks:
[all …]
H A Drenesas,cpg-mstp-clocks.yaml4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mstp-clocks.yaml#
7 title: Renesas Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks
13 The Clock Pulse Generator (CPG) can gate SoC device clocks. The gates are
16 This device tree binding describes a single 32 gate clocks group per node.
17 Clocks are referenced by user nodes by the Module Stop (MSTP) node phandle
24 - renesas,r7s72100-mstp-clocks # RZ/A1
25 - renesas,r8a73a4-mstp-clocks # R-Mobile APE6
26 - renesas,r8a7740-mstp-clocks # R-Mobile A1
27 - renesas,r8a7778-mstp-clocks # R-Car M1
28 - renesas,r8a7779-mstp-clocks # R-Car H1
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dversal-net-clk.dtsi82 clocks = <&clk450>, <&clk450>;
86 clocks = <&clk450>, <&clk450>;
90 clocks = <&clk450>, <&clk450>;
94 clocks = <&clk450>, <&clk450>;
98 clocks = <&clk450>, <&clk450>;
102 clocks = <&clk450>, <&clk450>;
106 clocks = <&clk450>, <&clk450>;
110 clocks = <&clk450>, <&clk450>;
114 clocks = <&clk160>, <&clk160>;
118 clocks = <&clk160>, <&clk160>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap24xx-clocks.dtsi11 clocks = <&func_96m_ck>, <&mcbsp_clks>;
19 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
25 clocks = <&func_96m_ck>, <&mcbsp_clks>;
33 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
77 clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>;
85 clocks = <&aplls_clkin_ck>;
93 clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>;
102 clocks = <&osc_ck>;
124 clocks = <&sys_ck>, <&sys_ck>;
131 clocks = <&sys_ck>;
[all …]
H A Domap3xxx-clocks.dtsi17 …clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck…
24 clocks = <&osc_sys_ck>;
34 clocks = <&osc_sys_ck>;
42 clocks = <&dpll3_ck>;
50 clocks = <&dpll3_m2_ck>;
58 clocks = <&dpll4_ck>;
66 clocks = <&dpll3_m2x2_ck>;
74 clocks = <&sys_ck>;
94 clocks = <&core_96m_fck>, <&mcbsp_clks>;
102 clocks = <&per_96m_fck>, <&mcbsp_clks>;
[all …]
H A Domap2430-clocks.dtsi12 clocks = <&func_96m_ck>, <&mcbsp_clks>;
19 clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;
25 clocks = <&func_96m_ck>, <&mcbsp_clks>;
33 clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>;
39 clocks = <&func_96m_ck>, <&mcbsp_clks>;
47 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
55 clocks = <&dsp_fck>;
63 clocks = <&dsp_fck>;
73 clocks = <&iva2_1_gate_ick>, <&iva2_1_div_ick>;
79 clocks = <&core_ck>;
[all …]
H A Domap54xx-clocks.dtsi19 clocks = <&pad_clks_src_ck>;
42 clocks = <&slimbus_src_clk>;
121 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>;
129 clocks = <&dpll_abe_ck>;
136 clocks = <&dpll_abe_x2_ck>;
146 clocks = <&dpll_abe_m2x2_ck>;
155 clocks = <&dpll_abe_m2x2_ck>;
165 clocks = <&aess_fclk>;
175 clocks = <&dpll_abe_m2x2_ck>;
184 clocks = <&dpll_abe_x2_ck>;
[all …]
H A Dam43xx-clocks.dtsi12 clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>;
21 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
30 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
39 clocks = <&sys_clkin_ck>;
48 clocks = <&sys_clkin_ck>;
57 clocks = <&sys_clkin_ck>;
66 clocks = <&sys_clkin_ck>;
75 clocks = <&sys_clkin_ck>;
84 clocks = <&sys_clkin_ck>;
93 clocks = <&sys_clkin_ck>;
[all …]
H A Domap44xx-clocks.dtsi26 clocks = <&pad_clks_src_ck>;
56 clocks = <&slimbus_src_clk>;
156 clocks = <&abe_dpll_refclk_mux_ck>, <&abe_dpll_bypass_clk_mux_ck>;
164 clocks = <&dpll_abe_ck>;
172 clocks = <&dpll_abe_x2_ck>;
184 clocks = <&dpll_abe_m2x2_ck>;
193 clocks = <&dpll_abe_m2x2_ck>;
204 clocks = <&dpll_abe_x2_ck>;
216 clocks = <&sys_clkin_ck>, <&dpll_abe_m3x2_ck>;
225 clocks = <&sys_clkin_ck>, <&core_hsd_byp_clk_mux_ck>;
[all …]
H A Domap2420-clocks.dtsi12 clocks = <&core_ck>;
20 clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
28 clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>;
34 clocks = <&sys_clkout2_src>;
44 clocks = <&dsp_fck>;
52 clocks = <&dsp_fck>;
62 clocks = <&dsp_gate_ick>, <&dsp_div_ick>;
68 clocks = <&core_ck>;
76 clocks = <&core_ck>;
85 clocks = <&iva1_gate_ifck>, <&iva1_div_ifck>;
[all …]
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi11 clocks = <&corex2_fck>;
19 clocks = <&corex2_fck>;
28 clocks = <&sys_ck>, <&sys_ck>;
37 clocks = <&dpll5_ck>;
46 clocks = <&core_ck>;
54 clocks = <&core_ck>;
62 clocks = <&core_ck>;
70 clocks = <&core_ck>;
78 clocks = <&dpll4_m2x2_ck>;
86 clocks = <&core_ck>;
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dst,stih4xx.txt15 - clocks: from common clock binding: handle hardware IP needed clocks, the
16 number of clocks may depend of the SoC type.
17 See ../clocks/clock-bindings.txt for details.
18 - clock-names: names of the clocks listed in clocks property in the same
33 - clocks: from common clock binding: handle hardware IP needed clocks, the
34 number of clocks may depend of the SoC type.
35 See ../clocks/clock-bindings.txt for details.
36 - clock-names: names of the clocks listed in clocks property in the same
66 - clocks: from common clock binding: handle hardware IP needed clocks, the
67 number of clocks may depend of the SoC type.
[all …]
/linux/drivers/clk/bcm/
H A Dclk-bcm281xx.c19 .clocks = CLOCKS("ref_crystal"),
35 .clocks = CLOCKS("bbl_32k",
44 .clocks = CLOCKS("ref_crystal",
53 .clocks = CLOCKS("var_312m",
77 .clocks = CLOCKS("ref_crystal",
96 .clocks = CLOCKS("ref_crystal",
108 .clocks = CLOCKS("ref_crystal",
120 .clocks = CLOCKS("ref_crystal",
132 .clocks = CLOCKS("ref_crystal",
144 .clocks = CLOCKS("ref_crystal",
[all …]
H A Dclk-bcm21664.c17 .clocks = CLOCKS("ref_crystal"),
35 .clocks = CLOCKS("bbl_32k",
59 .clocks = CLOCKS("ref_crystal",
71 .clocks = CLOCKS("ref_crystal",
83 .clocks = CLOCKS("ref_crystal",
95 .clocks = CLOCKS("ref_crystal",
106 .clocks = CLOCKS("ref_32k"), /* Verify */
111 .clocks = CLOCKS("ref_32k"), /* Verify */
116 .clocks = CLOCKS("ref_32k"), /* Verify */
121 .clocks = CLOCKS("ref_32k"), /* Verify */
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi40 clocks = <&timclk>, <&pclk>;
49 clocks = <&timclk>, <&pclk>;
64 clocks = <&pclk>;
78 clocks = <&pclk>;
92 clocks = <&pclk>;
107 clocks = <&pclk>;
215 clocks = <&mxtal>;
223 clocks = <&mxtal>;
230 clocks = <&pll1>;
238 clocks = <&hclk>;
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-clocks.dtsi8 clocks {
16 clocks = <&mainpllclk>, <&refclksys>;
26 clocks = <&mainmuxclk>;
35 clocks = <&mainmuxclk>;
44 clocks = <&mainmuxclk>;
54 clocks = <&mainmuxclk>;
64 clocks = <&chipclk1>;
73 clocks = <&chipclk1>;
82 clocks = <&papllclk>;
91 clocks = <&chipclk1>;
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr7s72100.dtsi31 /* Fixed factor clocks */
35 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
57 clocks = <&cpg_clocks R7S72100_CLK_I>;
62 /* External clocks */
73 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
81 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
131 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
145 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
159 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
173 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
[all …]
/linux/include/dt-bindings/clock/
H A Ddra7.h11 /* mpu clocks */
14 /* dsp1 clocks */
17 /* ipu1 clocks */
20 /* ipu clocks */
31 /* dsp2 clocks */
34 /* rtc clocks */
37 /* vip clocks */
42 /* vpe clocks */
47 /* coreaon clocks */
51 /* l3main1 clocks */
[all …]
/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dda8xx-cfgchip.txt1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks
5 gates. This document describes the bindings for those clocks.
10 USB PHY clocks
13 - compatible: shall be "ti,da830-usb-phy-clocks".
15 - clocks: phandles to the parent clocks corresponding to clock-names
18 This node provides two clocks. The clock at index 0 is the USB 2.0 PHY 48MHz
26 - clocks: phandle to the parent clock
34 - clocks: phandle to the parent clock
42 - clocks: phandles to the parent clocks corresponding to clock-names
50 - clocks: phandles to the parent clocks corresponding to clock-names
[all …]

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