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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-388-clearfog.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "armada-388-clearfog.dtsi"
13 compatible = "solidrun,clearfog-pro-a1", "solidrun,clearfog-a1",
18 internal-regs {
28 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
34 gpio-keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&rear_button_pins>;
37 pinctrl-names = "default";
[all …]
H A Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/samsung/
H A Dexynos-usi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
26 - items:
[all …]
/freebsd/sys/dev/bhnd/cores/pci/
H A Dbhnd_pci_hostbvar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
37 * PCI/PCIe-Gen1 Host Bridge definitions.
48 * PCI/PCIe-Gen1 endpoint-mode device quirks
69 * The purpose of this work-around is unclear; there is some
77 * On PCI-attached BCM4321CB* boards, the PCI latency timer must be set
91 * PCI-PM power management must be explicitly enabled via
110 * The idle time for entering L1 low-power state must be
111 * explicitly set (to 114ns) to fix slow L1->L0 transition issues.
[all …]
H A Dbhnd_pci_hostb.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
38 * Broadcom BHND PCI/PCIe-Gen1 PCI-Host Bridge.
41 * endpoint mode.
43 * Host-level PCI operations are handled at the bhndb bridge level by the
75 /* Device driver work-around variations */
146 /* Apple BCM4331 board-specific quirks */
174 #define BHND_PCI_SOFTC(_sc) (&((_sc)->common))
177 bhnd_bus_read_2(BHND_PCI_SOFTC(_sc)->mem_res, (_reg))
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dfsl,imx8-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Zhu <hongxing.zhu@nxp.com>
13 "#phy-cells":
18 - fsl,imx8mm-pcie-phy
19 - fsl,imx8mp-pcie-phy
27 clock-names:
29 - const: ref
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8295p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include "sa8540p-pmics.dtsi"
19 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
26 stdout-path = "serial0:115200n8";
29 dp2-connector {
[all …]
H A Dsc8280xp-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sc8280xp-pmics.dtsi"
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
26 compatible = "pwm-backlight";
28 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
29 power-supply = <&vreg_edp_bl>;
31 pinctrl-names = "default";
[all …]
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
H A Dx1e80100-asus-vivobook-s15.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "x1e80100-pmics.dtsi"
17 compatible = "asus,vivobook-s15", "qcom,x1e80100";
18 chassis-type = "laptop";
20 pmic-glink {
21 compatible = "qcom,x1e80100-pmic-glink",
22 "qcom,sm8550-pmic-glink",
[all …]
H A Dx1e80100-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "x1e80100-pmics.dtsi"
18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
24 wcd938x: audio-codec {
25 compatible = "qcom,wcd9385-codec";
[all …]
H A Dsa8775p-ride.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sa8775p-pmics.dtsi"
28 stdout-path = "serial0:115200n8";
33 regulators-0 {
34 compatible = "qcom,pmm8654au-rpmh-regulators";
35 qcom,pmic-id = "a";
38 regulator-name = "vreg_s4a";
[all …]
H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
H A Dx1e78100-lenovo-thinkpad-t14s.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "x1e80100-pmics.dtsi"
19 compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";
20 chassis-type = "laptop";
22 gpio-keys {
[all …]
H A Dsm8350-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2020-2021, Linaro Limited
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20 chassis-type = "embedded";
27 stdout-path = "serial0:115200n8";
30 hdmi-connector {
31 compatible = "hdmi-connector";
36 remote-endpoint = <&lt9611_out>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
[all …]
H A Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and
5 snps,dw-pcie-ep.yaml.
6 Some of the controller instances are dual mode where in they can work either
7 in root port mode or endpoint mode but one at a time.
10 - power-domains: A phandle to the node that controls power to the respective
20 "include/dt-bindings/power/tegra194-powergate.h" file.
21 - reg: A list of physical base address and length pairs for each set of
22 controller registers. Must contain an entry for each entry in the reg-names
24 - reg-names: Must include the following entries:
26 "config": As per the definition in snps,dw-pcie.yaml
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Dcn9130-cf.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
19 reg_usb3_vbus0: regulator-usb3-vbus0 {
20 compatible = "regulator-fixed";
21 regulator-name = "vbus0";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
29 i2c-bus = <&cp0_i2c1>;
30 los-gpios = <&expander0 12 GPIO_ACTIVE_HIGH>;
31 mod-def0-gpios = <&expander0 15 GPIO_ACTIVE_LOW>;
[all …]
H A Dcn9130-cf-pro.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
16 #include "cn9130-cf.dtsi"
20 compatible = "solidrun,cn9130-clearfog-pro",
21 "solidrun,cn9130-sr-som", "marvell,cn9130";
23 gpio-keys {
[all …]
H A Darmada-7040-mochabin.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-7040.dtsi"
17 "marvell,armada-ap806-qua
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynosautov9-sadk.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-pat
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101-oriole.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "gs101-pinctrl.h"
18 compatible = "google,gs101-oriole", "google,gs101";
27 stdout-path = &serial_0;
30 gpio-keys {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
[all …]
H A Dimx8mm-iot-gateway.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "imx8mm-ucm-som.dtsi"
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 compatible = "compulab,imx8mm-iot-gateway", "compulab,imx8mm-ucm-som", "fsl,imx8mm";
11 regulator-usbhub-ena {
12 compatible = "regulator-fixed";
13 regulator-name = "usbhub_ena";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
17 enable-active-high;
[all …]
H A Dimx8mp-venice-gw71xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-usb-b-connector", "usb-b-connector";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_usbcon1>;
16 label = "Type-C";
17 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
21 remote-endpoint = <&usb3_dwc>;
[all …]

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