Home
last modified time | relevance | path

Searched full:clkctrl (Results 1 – 25 of 31) sorted by relevance

12

/linux/drivers/clk/ti/
H A Dclk-7xx.c44 …{ DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP | CLKF_NO_IDLEST, "ipu1-clkctrl:…
129 { DRA7_IPU_MCASP1_CLKCTRL, dra7_mcasp1_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0000:22" },
130 { DRA7_IPU_TIMER5_CLKCTRL, dra7_timer5_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0008:24" },
131 { DRA7_IPU_TIMER6_CLKCTRL, dra7_timer6_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0010:24" },
132 { DRA7_IPU_TIMER7_CLKCTRL, dra7_timer7_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0018:24" },
133 { DRA7_IPU_TIMER8_CLKCTRL, dra7_timer8_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0020:24" },
135 { DRA7_IPU_UART6_CLKCTRL, dra7_uart6_bit_data, CLKF_SW_SUP, "ipu-clkctrl:0030:24" },
215 "atl-clkctrl:0000:24",
226 { DRA7_ATL_ATL_CLKCTRL, dra7_atl_bit_data, CLKF_SW_SUP, "atl-clkctrl:0000:26" },
302 { DRA7_DSS_DSS_CORE_CLKCTRL, dra7_dss_core_bit_data, CLKF_SW_SUP, "dss-clkctrl:0000:8" },
[all …]
H A Dclk-44xx.c59 "abe-clkctrl:0018:26",
79 "abe-clkctrl:0020:26",
92 "abe-clkctrl:0028:26",
105 "abe-clkctrl:0030:26",
118 "abe-clkctrl:0038:26",
186 { OMAP4_AESS_CLKCTRL, omap4_aess_bit_data, CLKF_SW_SUP, "abe-clkctrl:0008:24" },
188 { OMAP4_DMIC_CLKCTRL, omap4_dmic_bit_data, CLKF_SW_SUP, "abe-clkctrl:0018:24" },
189 { OMAP4_MCASP_CLKCTRL, omap4_mcasp_bit_data, CLKF_SW_SUP, "abe-clkctrl:0020:24" },
190 { OMAP4_MCBSP1_CLKCTRL, omap4_mcbsp1_bit_data, CLKF_SW_SUP, "abe-clkctrl:0028:24" },
191 { OMAP4_MCBSP2_CLKCTRL, omap4_mcbsp2_bit_data, CLKF_SW_SUP, "abe-clkctrl:0030:24" },
[all …]
H A Dclk-54xx.c53 "abe-clkctrl:0018:26",
73 "abe-clkctrl:0028:26",
86 "abe-clkctrl:0030:26",
99 "abe-clkctrl:0038:26",
139 { OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe-clkctrl:0008:24" },
141 { OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe-clkctrl:0018:24" },
142 { OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe-clkctrl:0028:24" },
143 { OMAP5_MCBSP2_CLKCTRL, omap5_mcbsp2_bit_data, CLKF_SW_SUP, "abe-clkctrl:0030:24" },
144 { OMAP5_MCBSP3_CLKCTRL, omap5_mcbsp3_bit_data, CLKF_SW_SUP, "abe-clkctrl:0038:24" },
145 { OMAP5_TIMER5_CLKCTRL, omap5_timer5_bit_data, CLKF_SW_SUP, "abe-clkctrl:0048:24" },
[all …]
H A Dclk-33xx.c19 "clk-24mhz-clkctrl:0000:0",
151 "l3-aon-clkctrl:0000:19",
152 "l3-aon-clkctrl:0000:30",
157 "l3-aon-clkctrl:0000:20",
167 "l3-aon-clkctrl:0000:22",
192 { AM3_L3_AON_DEBUGSS_CLKCTRL, am3_debugss_bit_data, CLKF_SW_SUP, "l3-aon-clkctrl:0000:24" },
207 { AM3_L4_RTC_RTC_CLKCTRL, NULL, CLKF_SW_SUP, "clk-24mhz-clkctrl:0000:0" },
241 DT_CLK(NULL, "timer_32k_ck", "clk-24mhz-clkctrl:0000:0"),
243 DT_CLK(NULL, "clkdiv32k_ick", "clk-24mhz-clkctrl:0000:0"),
244 DT_CLK(NULL, "dbg_clka_ck", "l3-aon-clkctrl:0000:30"),
[all …]
H A Dclk-43xx.c35 …{ AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL, am4_counter_32k_bit_data, CLKF_SW_SUP, "l4-wkup-aon-clkctrl…
256 DT_CLK(NULL, "gpio0_dbclk", "l4-wkup-clkctrl:0148:8"),
257 DT_CLK(NULL, "gpio1_dbclk", "l4ls-clkctrl:0058:8"),
258 DT_CLK(NULL, "gpio2_dbclk", "l4ls-clkctrl:0060:8"),
259 DT_CLK(NULL, "gpio3_dbclk", "l4ls-clkctrl:0068:8"),
260 DT_CLK(NULL, "gpio4_dbclk", "l4ls-clkctrl:0070:8"),
261 DT_CLK(NULL, "gpio5_dbclk", "l4ls-clkctrl:0078:8"),
262 DT_CLK(NULL, "synctimer_32kclk", "l4-wkup-aon-clkctrl:0008:8"),
263 DT_CLK(NULL, "usb_otg_ss0_refclk960m", "l3s-clkctrl:01f8:8"),
264 DT_CLK(NULL, "usb_otg_ss1_refclk960m", "l3s-clkctrl:0200:8"),
[all …]
H A Dclkctrl.c3 * OMAP clkctrl clock support
250 /* Get clkctrl clock base name based on clkctrl_name or dts node */
258 /* l4per-clkctrl:1234:0 style naming based on clkctrl_name */ in clkctrl_get_clock_name()
260 clock_name = kasprintf(GFP_KERNEL, "%s-clkctrl:%04x:%d", in clkctrl_get_clock_name()
280 /* l4per-clkctrl:1234:0 style naming based on node name */ in clkctrl_get_clock_name()
469 * compatible property for clkctrl.
494 if (!strncmp("ti,clkctrl-", compat, prefix_len)) { in clkctrl_get_name()
578 pr_err("%pOF not found from clkctrl data.\n", node); in _ti_omap4_clkctrl_setup()
601 * The code below can be removed when all clkctrl nodes use domain in _ti_omap4_clkctrl_setup()
719 CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
[all …]
H A Dclock.h75 /* CLKCTRL flags */
160 /* CLKCTRL type definitions */
H A DMakefile8 clkctrl.o
/linux/drivers/clk/mxs/
H A Dclk-imx28.c17 static void __iomem *clkctrl; variable
18 #define CLKCTRL clkctrl macro
20 #define PLL0CTRL0 (CLKCTRL + 0x0000)
21 #define PLL1CTRL0 (CLKCTRL + 0x0020)
22 #define PLL2CTRL0 (CLKCTRL + 0x0040)
23 #define CPU (CLKCTRL + 0x0050)
24 #define HBUS (CLKCTRL + 0x0060)
25 #define XBUS (CLKCTRL + 0x0070)
26 #define XTAL (CLKCTRL + 0x0080)
27 #define SSP0 (CLKCTRL + 0x0090)
[all …]
H A Dclk-imx23.c16 static void __iomem *clkctrl; variable
19 #define CLKCTRL clkctrl macro
22 #define PLLCTRL0 (CLKCTRL + 0x0000)
23 #define CPU (CLKCTRL + 0x0020)
24 #define HBUS (CLKCTRL + 0x0030)
25 #define XBUS (CLKCTRL + 0x0040)
26 #define XTAL (CLKCTRL + 0x0050)
27 #define PIX (CLKCTRL + 0x0060)
28 #define SSP (CLKCTRL + 0x0070)
29 #define GPMI (CLKCTRL + 0x0080)
[all …]
/linux/arch/arm/boot/dts/axis/
H A Dartpec6.dtsi45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
103 clkctrl: clkctrl@f8000000 { label
105 compatible = "axis,artpec6-clkctrl";
115 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
122 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
259 clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
281 clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
289 clocks = <&clkctrl ARTPEC6_CLK_ETH_ACLK>,
290 <&clkctrl ARTPEC6_CLK_PTP_REF>;
335 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dartpec6.txt19 See dt-bindings/clock/axis,artpec6-clkctrl.h for the list of valid identifiers.
20 - compatible: Should be "axis,artpec6-clkctrl"
35 clkctrl: clkctrl@f8000000 {
37 compatible = "axis,artpec6-clkctrl";
H A Dimx23-clock.yaml64 const: fsl,imx23-clkctrl
82 compatible = "fsl,imx23-clkctrl";
H A Dimx28-clock.yaml87 const: fsl,imx28-clkctrl
105 compatible = "fsl,imx28-clkctrl";
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx-clocks.dtsi635 compatible = "ti,clkctrl";
642 compatible = "ti,clkctrl";
649 compatible = "ti,clkctrl";
656 compatible = "ti,clkctrl";
663 compatible = "ti,clkctrl";
670 compatible = "ti,clkctrl";
677 compatible = "ti,clkctrl";
684 compatible = "ti,clkctrl";
700 compatible = "ti,clkctrl";
707 compatible = "ti,clkctrl";
[all …]
H A Domap44xx-clocks.dtsi1161 compatible = "ti,clkctrl";
1177 compatible = "ti,clkctrl";
1193 compatible = "ti,clkctrl";
1212 compatible = "ti,clkctrl";
1228 compatible = "ti,clkctrl";
1244 compatible = "ti,clkctrl";
1260 compatible = "ti,clkctrl";
1276 compatible = "ti,clkctrl";
1292 compatible = "ti,clkctrl";
1308 compatible = "ti,clkctrl";
[all …]
H A Domap54xx-clocks.dtsi1109 compatible = "ti,clkctrl";
1125 compatible = "ti,clkctrl";
1141 compatible = "ti,clkctrl";
1160 compatible = "ti,clkctrl";
1176 compatible = "ti,clkctrl";
1192 compatible = "ti,clkctrl";
1208 compatible = "ti,clkctrl";
1224 compatible = "ti,clkctrl";
1240 compatible = "ti,clkctrl";
1256 compatible = "ti,clkctrl";
[all …]
H A Dam43xx-clocks.dtsi875 compatible = "ti,clkctrl";
882 compatible = "ti,clkctrl";
889 compatible = "ti,clkctrl";
906 compatible = "ti,clkctrl";
922 compatible = "ti,clkctrl";
938 compatible = "ti,clkctrl";
954 compatible = "ti,clkctrl";
961 compatible = "ti,clkctrl";
968 compatible = "ti,clkctrl";
975 compatible = "ti,clkctrl";
[all …]
H A Ddm814x-clocks.dtsi346 compatible = "ti,clkctrl";
360 compatible = "ti,clkctrl";
374 compatible = "ti,clkctrl";
H A Ddm816x-clocks.dtsi257 compatible = "ti,clkctrl";
271 compatible = "ti,clkctrl";
/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek,mt7621-pcie.yaml141 clocks = <&clkctrl 24>;
156 clocks = <&clkctrl 25>;
171 clocks = <&clkctrl 26>;
/linux/drivers/clk/axis/
H A Dclk-artpec6.c15 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
113 CLK_OF_DECLARE_DRIVER(artpec6_clkctrl, "axis,artpec6-clkctrl",
227 { .compatible = "axis,artpec6-clkctrl" },
/linux/arch/arm/mach-mxs/
H A Dmach-mxs.c359 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl"); in mxs_restart_init()
361 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl"); in mxs_restart_init()
366 if (of_device_is_compatible(np, "fsl,imx23-clkctrl")) in mxs_restart_init()
/linux/arch/arm/mach-omap2/
H A Dcm.h51 * @xlate_clkctrl: ptr to the SoC CM-specific clkctrl xlate addr impl
H A Dcm33xx.c257 * am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL
277 * am33xx_cm_module_disable - Disable the module inside CLKCTRL

12