/linux/drivers/rtc/ |
H A D | rtc-jz4740.c | 66 struct clk_hw clk32k; member 309 struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); in jz4740_rtc_clk32k_enable() 318 struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); in jz4740_rtc_clk32k_disable() 325 struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); in jz4740_rtc_clk32k_is_enabled() 409 rtc->clk32k.init = CLK_HW_INIT_HW("clk32k", __clk_get_hw(clk), in jz4740_rtc_probe() 412 ret = devm_clk_hw_register(dev, &rtc->clk32k); in jz4740_rtc_probe() 415 "Unable to register clk32k clock\n"); in jz4740_rtc_probe() 418 &rtc->clk32k); in jz4740_rtc_probe() 421 "Unable to register clk32k clock provider\n"); in jz4740_rtc_probe()
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/linux/arch/arm/boot/dts/microchip/ |
H A D | at91sam9n12.dtsi | 125 clocks = <&clk32k>, <&main_xtal>; 133 clocks = <&clk32k>; 146 clocks = <&clk32k>; 149 clk32k: clock-controller@fffffe50 { label 175 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 185 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 193 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 717 clocks = <&clk32k>; 728 clocks = <&clk32k>;
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H A D | at91sam9rl.dtsi | 141 …c PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 771 clocks = <&clk32k>, <&main_xtal>; 778 clocks = <&clk32k>; 784 clocks = <&clk32k>; 798 clocks = <&clk32k>; 802 clk32k: clock-controller@fffffd50 { label 813 clocks = <&clk32k>; 827 clocks = <&clk32k>;
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H A D | at91sam9g45.dtsi | 137 clocks = <&clk32k>, <&main_xtal>; 144 clocks = <&clk32k>; 158 clocks = <&clk32k>; 167 …c PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 177 …c PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 883 clocks = <&clk32k>; 926 clk32k: clock-controller@fffffd50 { label 937 clocks = <&clk32k>; 945 clocks = <&clk32k>;
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H A D | sama7g5.dtsi | 262 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>; 270 clocks = <&clk32k 0>; 276 clocks = <&clk32k 0>; 288 clocks = <&clk32k 1>; 291 clk32k: clock-controller@e001d050 { label 307 clocks = <&clk32k 1>; 314 clocks = <&clk32k 0>; 328 …PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>; 922 …PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>;
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H A D | at91sam9x5.dtsi | 134 clocks = <&clk32k>, <&main_xtal>; 141 clocks = <&clk32k>; 147 clocks = <&clk32k>; 157 clk32k: clock-controller@fffffe50 { label 170 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 180 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 864 clocks = <&clk32k>; 875 clocks = <&clk32k>;
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H A D | sam9x60.dtsi | 570 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k 0>; 580 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&clk32k 0>; 1063 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_GCK 25>, <&clk32k 1>; 1340 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>; 1347 clocks = <&clk32k 0>; 1353 clocks = <&clk32k 0>; 1365 clocks = <&clk32k 1>; 1375 clk32k: clock-controller@fffffe50 { label 1391 clocks = <&clk32k 1>; 1398 clocks = <&clk32k 0>;
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H A D | sama5d2.dtsi | 231 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 295 clocks = <&clk32k>, <&main_xtal>; 402 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>; 412 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>; 683 clocks = <&clk32k>; 689 clocks = <&clk32k>; 706 clocks = <&clk32k>; 710 clk32k: clock-controller@f8048050 { label 721 clocks = <&clk32k>;
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H A D | sama5d4.dtsi | 192 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 261 clocks = <&clk32k>, <&main_xtal>; 398 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>; 637 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>; 647 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>; 743 clocks = <&clk32k>; 749 clocks = <&clk32k>; 763 clocks = <&clk32k>; 767 clk32k: clock-controller@fc068650 { label 778 clocks = <&clk32k>;
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H A D | sama5d3.dtsi | 157 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; 1011 clocks = <&clk32k>, <&main_xtal>; 1018 clocks = <&clk32k>; 1024 clocks = <&clk32k>; 1038 clocks = <&clk32k>; 1045 clk32k: clock-controller@fffffe50 { label 1056 clocks = <&clk32k>;
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H A D | sama5d3_tcb1.dtsi | 26 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&clk32k>;
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/linux/drivers/clk/mxs/ |
H A D | clk-imx23.c | 85 clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, enumerator 138 clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16); in mx23_clocks_init() 140 clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); in mx23_clocks_init()
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H A D | clk-imx28.c | 139 clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, enumerator 208 clks[lradc] = mxs_clk_fixed_factor("lradc", "clk32k", 1, 16); in mx28_clocks_init() 210 clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); in mx28_clocks_init()
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/linux/include/linux/platform_data/ |
H A D | net-cw1200.h | 20 bool enable); /* Control CLK32K */ 35 bool enable); /* Control CLK32K */
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | twl6040.txt | 22 - clocks: phandle to the clk32k and/or to mclk clock provider 23 - clock-names: Must be "clk32k" for the 32K clock and "mclk" for the MCLK.
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-myirtech-myc.dtsi | 30 clk32k: clk32k { label 157 clocks = <&clk32k>;
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/linux/drivers/clocksource/ |
H A D | timer-atmel-st.c | 87 static struct clocksource clk32k = { variable 247 return clocksource_register_hz(&clk32k, sclk_rate); in atmel_st_timer_init()
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/linux/Documentation/devicetree/bindings/rtc/ |
H A D | atmel,at91rm9200-rtc.yaml | 54 clocks = <&clk32k>;
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H A D | atmel,at91sam9260-rtt.yaml | 70 clocks = <&clk32k>;
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx23-clock.yaml | 47 clk32k 28
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H A D | imx28-clock.yaml | 62 clk32k 43
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/linux/drivers/clk/mediatek/ |
H A D | clk-mt8188-infra_ao.c | 119 GATE_INFRA_AO1(CLK_INFRA_AO_HDMI_32K, "infra_ao_hdmi_32k", "clk32k", 12), 131 GATE_INFRA_AO1(CLK_INFRA_AO_PCIE_TL_32K, "infra_ao_pcie_tl_32k", "clk32k", 26),
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H A D | clk-mt8186-infra_ao.c | 168 GATE_INFRA_AO3_FLAGS(CLK_INFRA_AO_SSPM_32K_SELF, "infra_ao_sspm_32k", "clk32k", 4, 187 GATE_INFRA_AO3(CLK_INFRA_AO_FADSP_32K, "infra_ao_fadsp_32k", "clk32k", 23),
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H A D | clk-mt8195-infra_ao.c | 115 GATE_INFRA_AO1(CLK_INFRA_AO_HDMI_32K, "infra_ao_hdmi_32k", "clk32k", 12), 128 GATE_INFRA_AO1(CLK_INFRA_AO_PCIE_TL_32K, "infra_ao_pcie_tl_32k", "clk32k", 26),
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/linux/Documentation/devicetree/bindings/power/reset/ |
H A D | atmel,at91sam9260-shdwc.yaml | 79 clocks = <&clk32k>;
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