Searched +full:clk2 +full:- +full:enable +full:- +full:gpios (Results 1 – 10 of 10) sorted by relevance
| /linux/Documentation/devicetree/bindings/iio/frequency/ |
| H A D | adi,adf4377.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Antoniu Miclaus <antoniu.miclaus@analog.com> 11 - Dragos Bogdan <dragos.bogdan@analog.com> 14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N 25 - adi,adf4377 26 - adi,adf4378 31 spi-max-frequency: 37 clock-names: [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | gray-hawk-single.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 * Copyright (C) 2024-2025 Glider bv 11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture 28 #include <dt-bindings/gpio/gpio.h> 29 #include <dt-bindings/input/input.h> 30 #include <dt-bindings/leds/common.h> 31 #include <dt-bindings/media/video-interfaces.h> 35 compatible = "renesas,gray-hawk-single"; 49 can_transceiver0: can-phy0 { 51 #phy-cells = <0>; [all …]
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 16 nvidia,hpd-gpio = 18 pll-supply = <®_1v8_avdd_hdmi_pll>; 19 vdd-supply = <®_3v3_avdd_hdmi>; 24 lan-reset-n-hog { 25 gpio-hog; 26 gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>; 27 output-high; 28 line-name = "LAN_RESET#"; [all …]
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| H A D | tegra30-asus-p1801-t.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 13 model = "Asus Portable AiO P1801-T"; 14 compatible = "asus,p1801-t", "nvidia,tegra30"; 15 chassis-type = "convertible"; [all …]
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| H A D | tegra30-apalis-v1.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 16 avdd-pexa-supply = <&vdd2_reg>; 17 avdd-pexb-supply = <&vdd2_reg>; 18 avdd-pex-pll-supply = <&vdd2_reg>; 19 avdd-plle-supply = <&ldo6_reg>; 20 hvdd-pex-supply = <®_module_3v3>; 21 vddio-pex-ctl-supply = <®_module_3v3>; 22 vdd-pexa-supply = <&vdd2_reg>; 23 vdd-pexb-supply = <&vdd2_reg>; 27 nvidia,num-lanes = <4>; [all …]
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| H A D | tegra30-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 avdd-pexa-supply = <&vdd2_reg>; 16 avdd-pexb-supply = <&vdd2_reg>; 17 avdd-pex-pll-supply = <&vdd2_reg>; 18 avdd-plle-supply = <&ldo6_reg>; 19 hvdd-pex-supply = <®_module_3v3>; 20 vddio-pex-ctl-supply = <®_module_3v3>; 21 vdd-pexa-supply = <&vdd2_reg>; 22 vdd-pexb-supply = <&vdd2_reg>; 26 nvidia,num-lanes = <4>; [all …]
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| H A D | tegra30-asus-tf600t.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 16 chassis-type = "convertible"; 34 * pre-existing /chosen node to be available to insert the [all …]
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| H A D | tegra114-asus-tf701t.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 13 chassis-type = "convertible"; 29 trusted-foundations { 30 compatible = "tlm,trusted-foundations"; 31 tlm,version-major = <2>; 32 tlm,version-minor = <8>; 40 reserved-memory { [all …]
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| H A D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 21 avddio-pex-supply = <®_1v05_vdd>; 22 avdd-pex-pll-supply = <®_1v05_vdd>; 23 avdd-pll-erefe-supply = <®_1v05_avdd>; 24 dvddio-pex-supply = <®_1v05_vdd>; 25 hvdd-pex-pll-e-supply = <®_module_3v3>; 26 hvdd-pex-supply = <®_module_3v3>; 27 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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| H A D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 20 avddio-pex-supply = <®_1v05_vdd>; 21 avdd-pex-pll-supply = <®_1v05_vdd>; 22 avdd-pll-erefe-supply = <®_1v05_avdd>; 23 dvddio-pex-supply = <®_1v05_vdd>; 24 hvdd-pex-pll-e-supply = <®_module_3v3>; 25 hvdd-pex-supply = <®_module_3v3>; 26 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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