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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4377.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11 - Dragos Bogdan <dragos.bogdan@analog.com>
14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N
25 - adi,adf4377
26 - adi,adf4378
31 spi-max-frequency:
37 clock-names:
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/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
49 gpios = <&pca_gpio 8 GPIO_ACTIVE_LOW>;
55 gpios = <&pca_gpio 9 GPIO_ACTIVE_LOW>;
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H A Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
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H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
26 gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
27 output-high;
28 line-name = "LAN_RESET#";
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H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
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H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998-sony-xperia-yoshino.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
18 qcom,msm-id = <0x124 0x20000>, <0x124 0x20001>; /* 8998v2, v2.1 */
19 qcom,board-id = <8 0>;
23 compatible = "gpio-gate-clock";
24 pinctrl-0 = <&div_clk1>;
25 pinctrl-names = "default";
27 #clock-cells = <0>;
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/linux/sound/soc/codecs/
H A Dwm8994.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8994.c -- WM8994 ALSA SoC Audio driver
5 * Copyright 2009-12 Wolfson Microelectronics plc
114 struct wm8994 *control = wm8994->wm8994; in wm8958_micd_set_rate()
120 idle = !wm8994->jack_mic; in wm8958_micd_set_rate()
124 sysclk = wm8994->aifclk[1]; in wm8958_micd_set_rate()
126 sysclk = wm8994->aifclk[0]; in wm8958_micd_set_rate()
128 if (control->pdata.micd_rates) { in wm8958_micd_set_rate()
129 rates = control->pdata.micd_rates; in wm8958_micd_set_rate()
130 num_rates = control->pdata.num_micd_rates; in wm8958_micd_set_rate()
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/linux/drivers/gpu/drm/panel/
H A Dpanel-samsung-s6e8aa0.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MIPI-DSI based s6e8aa0 AMOLED LCD 5.3 inch panel driver.
130 int ret = ctx->error; in s6e8aa0_clear_error()
132 ctx->error = 0; in s6e8aa0_clear_error()
138 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in s6e8aa0_dcs_write()
141 if (ctx->error < 0) in s6e8aa0_dcs_write()
146 dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret, in s6e8aa0_dcs_write()
148 ctx->error = ret; in s6e8aa0_dcs_write()
154 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in s6e8aa0_dcs_read()
157 if (ctx->error < 0) in s6e8aa0_dcs_read()
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