| /linux/Documentation/devicetree/bindings/input/ |
| H A D | syna,rmi4.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jason A. Donenfeld <Jason@zx2c4.com> 11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com 12 - Vincent Huang <vincent.huang@tw.synaptics.com> 22 - syna,rmi4-i2c 23 - syna,rmi4-spi 28 '#address-cells': 31 '#size-cells': [all …]
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | phy_n.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 9 /* N-PHY registers. */ 18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */ 19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */ 20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */ 21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */ 22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */ 26 #define B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */ 27 #define B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */ 31 #define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */ [all …]
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_util.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved. 15 #define REG_MASK(n) ((BIT(n)) - 1) 41 * struct dpu_hw_blk - opaque hardware block object 52 * @ clip: clip shift 57 * @ thr_high: high threshold 59 * @ adjust_a: A-coefficients for mapping curve 60 * @ adjust_b: B-coefficients for mapping curve 61 * @ adjust_c: C-coefficients for mapping curve [all …]
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| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7870-a2corelte.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 chassis-type = "handset"; 30 #address-cells = <2>; 31 #size-cells = <1>; 34 stdout-path = &serial2; 37 compatible = "simple-framebuffer"; [all …]
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| H A D | exynos7870-on7xelte.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 chassis-type = "handset"; 30 #address-cells = <2>; 31 #size-cells = <1>; 34 stdout-path = &serial2; 37 compatible = "simple-framebuffer"; [all …]
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-lg-p895.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-lg-x3.dtsi" 11 pinctrl-names = "default"; 12 pinctrl-0 = <&state_default>; 15 /* GNSS UART-B pinmux */ 16 uartb-cts-rxd { 22 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 24 uartb-rts-txd { 30 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
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| H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; 30 * pre-existing /chosen node to be available to insert the [all …]
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| /linux/Documentation/admin-guide/pm/ |
| H A D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0 14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic… 15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha… 19 dynamically without pre-configuring via BIOS setup options. This dynamic 29 intel-speed-select configuration tool 32 Most Linux distribution packages may include the "intel-speed-select" tool. If not, 38 # cd tools/power/x86/intel-speed-select/ 43 ------------ 47 # intel-speed-select --help 49 The top-level help describes arguments and features. Notice that there is a [all …]
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| /linux/include/sound/ |
| H A D | emu10k1.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 16 #include <sound/pcm-indirect.h> 25 /* ---- [all...] |
| /linux/drivers/net/wireless/intel/iwlegacy/ |
| H A D | 3945.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 16 #include <linux/dma-mapping.h> 94 * il3945_disable_events - Disable selected events in uCode event log 99 * Use for only special debugging. This function is just a placeholder as-is, 107 u32 disable_ptr; /* SRAM address of event-disable bitmap array */ in il3945_disable_events() 110 0x00000000, /* 31 - 0 Event id numbers */ in il3945_disable_events() 111 0x00000000, /* 63 - 32 */ in il3945_disable_events() 112 0x00000000, /* 95 - 64 */ in il3945_disable_events() [all …]
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| H A D | common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 31 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a) 32 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a) 33 #define IL_WARN_ONCE(f, a...) dev_warn_once(&il->pci_dev->dev, f, ## a) 34 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a) 46 #define U32_PAD(n) ((4-(n))&0x3) 48 /* CT-KILL constants */ 56 * Use default noise value of -127 ... this is below the range of measurable [all …]
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| /linux/tools/power/x86/intel-speed-select/ |
| H A D | isst-display.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Intel dynamic_speed_select -- Enumerate and control features 26 str_len - curr_index, ","); in printcpulist() 31 index = snprintf(&str[curr_index], str_len - curr_index, "%d", in printcpulist() 67 for (i = size - 1; i >= 0; --i) { in printcpumask() 68 index = snprintf(&str[curr_index], str_len - curr_index, "%08x", in printcpumask() 74 strncat(&str[curr_index], ",", str_len - curr_index); in printcpumask() 97 for (i = 0; i < level - 1; ++i) in format_and_print_txt() 98 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print_txt() 133 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print() [all …]
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| /linux/drivers/media/usb/gspca/ |
| H A D | stk1135.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 45 /* -- read a register -- */ 48 struct usb_device *dev = gspca_dev->dev; in reg_r() 51 if (gspca_dev->usb_err < 0) in reg_r() 58 gspca_dev->usb_buf, 1, in reg_r() 61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r() 62 index, gspca_dev->usb_buf[0]); in reg_r() 64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r() 65 gspca_dev->usb_err = ret; in reg_r() 69 return gspca_dev->usb_buf[0]; in reg_r() [all …]
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| H A D | spca508.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr> 58 * Initialization data: this is the first set-up data written to the 67 /* READ {0x0000, 0x8114} -> 0000: 00 */ 75 /* Enable charge pump output, sync.serial,external 2x clock */ 79 /* --------------------------------------- */ 82 /* --------------------------------------- */ 91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */ 92 /* READ { 0x0001, 0x8802 } -> 0000: 08 */ 96 /* READ { 0x0001, 0x8803 } -> 0000: 00 */ [all …]
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| /linux/drivers/media/i2c/ |
| H A D | ov772x.c | 1 // SPDX-License-Identifier: GPL-2.0 12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 26 #include <linux/v4l2-mediabus.h> 31 #include <media/v4l2-ctrls.h> 32 #include <media/v4l2-device.h> 33 #include <media/v4l2-event.h> 34 #include <media/v4l2-fwnode.h> 35 #include <media/v4l2-image-sizes.h> 36 #include <media/v4l2-subdev.h> 41 #define GAIN 0x00 /* AGC - Gain control gain setting */ [all …]
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| /linux/drivers/gpu/drm/msm/registers/adreno/ |
| H A D | a6xx.xml | 1 <?xml version="1.0" encoding="UTF-8"?> 3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" 4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> 14 <!-- 17 - "cmd" - the register is used outside of renderpass and blits, 19 - "rp_blit" - the register is used inside renderpass or blits 26 --> 32 <bitfield name="CP_IPC_INTR_0" pos="4" type="boolean" variants="A7XX-"/> 33 <bitfield name="CP_IPC_INTR_1" pos="5" type="boolean" variants="A7XX-"/> 44 <!-- Same as above but different name??: --> [all …]
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| H A D | a5xx.xml | 1 <?xml version="1.0" encoding="UTF-8"?> 3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" 4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> 32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 --> 33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI --> 34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F --> 251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil --> 252 <value value="9" name="BLIT_S"/> <!-- separate stencil --> 255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output --> 851 <!-- CP Interrupt bits --> [all …]
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| /linux/drivers/media/platform/qcom/venus/ |
| H A D | hfi_plat_bufs_v6.c | 1 // SPDX-License-Identifier: GPL-2.0-only 88 * size for high resolution 117 u32 x, y, z; in size_h265d_lb_se_left_ctrl() local 119 x = ((height + 16 - 1) / 8) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl() 120 y = ((height + 32 - 1) / 8) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl() 121 z = ((height + 64 - 1) / 8) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl() 123 return max3(x, y, z); in size_h265d_lb_se_left_ctrl() 144 * for high resolution 154 u32 x, y, z; in size_vpxd_lb_fe_left_ctrl() local 156 x = ((height + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE; in size_vpxd_lb_fe_left_ctrl() [all …]
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| /linux/drivers/isdn/mISDN/ |
| H A D | dsp_core.c | 12 * Real-time tone generation 14 * Real-time cross-connection and conferrence 23 * The dsp module provides layer 2 for b-channels (64kbit). It provides 26 * - (1) generation of tones 27 * - (2) detection of dtmf tones 28 * - (3) crossconnecting and conferences (clocking) 29 * - (4) echo generation for delay test 30 * - (5) volume control 31 * - (6) disable receive data 32 * - (7) pipeline [all …]
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| /linux/drivers/video/fbdev/ |
| H A D | atafb.c | 2 * linux/drivers/video/atafb.c -- Atari builtin chipset frame buffer device 11 * - 03 Jan 95: Original version by Martin Schaller: The TT driver and 13 * - 09 Jan 95: Roman: I've added the hardware abstraction (hw_switch) 16 * - 07 May 95: Martin: Added colormap operations for the external driver 17 * - 21 May 95: Martin: Added support for overscan 19 * - Jul 95: Guenther Kelleter <guenther@pool.informatik.rwth-aachen.de>: 23 * - 27 Dec 95: Guenther: Implemented user definable video modes "user[0-7]" 25 * "R<x>;<y>;<depth>". (Makes sense only on Falcon) 28 * - 23 Sep 97: Juergen: added xres_virtual for cards like ProMST 29 * The external-part is legacy, therefore hardware-specific [all …]
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| H A D | amifb.c | 2 * linux/drivers/video/amifb.c -- Amiga builtin chipset frame buffer device 4 * Copyright (C) 1995-2003 Geert Uytterhoeven 30 * - 24 Jul 96: Copper generates now vblank interrupt and 32 * - 14 Jul 96: Rework and hopefully last ECS bugs fixed 33 * - 7 Mar 96: Hardware sprite support by Roman Zippel 34 * - 18 Feb 96: OCS and ECS support by Roman Zippel 36 * - 2 Dec 95: AGA version by Geert Uytterhoeven 107 --------------------- 111 +----------+---------------------------------------------+----------+-------+ 115 +----------###############################################----------+-------+ [all …]
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | cxgb4_main.c | 4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is 126 #define FW4_CFNAME "cxgb4/t4-config.txt" 127 #define FW5_CFNAME "cxgb4/t5-config.txt" 128 #define FW6_CFNAME "cxgb4/t6-config.txt" 144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which 154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)"); 158 * offset by 2 bytes in order to have the IP headers line up on 4-byte [all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | drxk_hard.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * drxk_hard: DRX-K DVB-C/T demodulator driver 5 * Copyright (C) 2010-2011 Digital Devices GmbH 45 return state->m_operation_mode == OM_DVBT; in is_dvbt() 50 return state->m_operation_mode == OM_QAM_ITU_A || in is_qam() 51 state->m_operation_mode == OM_QAM_ITU_B || in is_qam() 52 state->m_operation_mode == OM_QAM_ITU_C; in is_qam() 164 R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */ in Frac28a() 193 i2c_lock_bus(state->i2c, I2C_LOCK_SEGMENT); in drxk_i2c_lock() 194 state->drxk_i2c_exclusive_lock = true; in drxk_i2c_lock() [all …]
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| /linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_vop2.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Author: Andy Yan <andy.yan@rock-chips.com> 12 #include <linux/media-bus-format.h> 44 +----------+ +-------------+ +-----------+ 47 +----------+ +-------------+ +---------------+ +-------------+ +-----------+ 48 +----------+ +-------------+ |N from 6 layers| | | 49 | Cluster | | Sel 1 from 6| | Overlay0 +--->| Video Port0 | +-----------+ 51 +----------+ +-------------+ +---------------+ +-------------+ | LVDS | 52 +----------+ +-------------+ +-----------+ 54 | window0 | | Layer2 | +---------------+ +-------------+ +-----------+ [all …]
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| /linux/drivers/net/ethernet/intel/e1000e/ |
| H A D | phy.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 37 * e1000e_check_reset_block_generic - Check if PHY reset is blocked 54 * e1000e_get_phy_id - Retrieve the PHY ID and revision 62 struct e1000_phy_info *phy = &hw->phy; in e1000e_get_phy_id() 67 if (!phy->ops.read_reg) in e1000e_get_phy_id() 75 phy->id = (u32)(phy_id << 16); in e1000e_get_phy_id() 81 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in e1000e_get_phy_id() 82 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in e1000e_get_phy_id() 84 if (phy->id != 0 && phy->id != PHY_REVISION_MASK) in e1000e_get_phy_id() [all …]
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