| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | lbc.txt | 1 * Chipselect/Local Bus
6 chipselect number, and the remaining cells are the
7 offset into the chipselect.
8 - #size-cells : Either one or two, depending on how large each chipselect
10 - ranges : Each range corresponds to a single chipselect, and cover
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | davinci-nand.txt | 20 - ti,davinci-chipselect: number of chipselect. Indicates on the
21 davinci_nand driver which chipselect is used
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
40 addresses for given chipselect.
82 ti,davinci-chipselect = <1>;
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| /linux/drivers/spi/ |
| H A D | spi-xcomm.c | 40 u16 chipselect; member
93 put_unaligned_be16(spi_xcomm->chipselect, &buf[3]); in spi_xcomm_sync_config()
102 u16 chipselect = spi_xcomm->chipselect; in spi_xcomm_chipselect() local
105 chipselect |= BIT(cs); in spi_xcomm_chipselect()
107 chipselect &= ~BIT(cs); in spi_xcomm_chipselect()
109 spi_xcomm->chipselect = chipselect; in spi_xcomm_chipselect()
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| H A D | spi-bitbang-txrx.h | 6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
10 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
11 * that use your controller's clock and chipselect registers.
16 * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(),
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| H A D | spi-bitbang.c | 32 * chipselect() and friends may use spi_device->controller_data and
341 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE : in spi_bitbang_set_cs()
356 * We only need the chipselect callback if we are actually using it. in spi_bitbang_init()
359 * driver-specific chipselect routine. in spi_bitbang_init()
364 if (custom_cs && !bitbang->chipselect) in spi_bitbang_init()
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| /linux/drivers/mtd/nand/raw/ |
| H A D | hisi504_nand.c | 133 int chipselect; member
215 | ((host->chipselect & HINFC504_DMA_CTRL_CS_MASK) in hisi_nfc_dma_transfer()
289 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_erase()
308 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_readid()
323 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_status()
332 static int hisi_nfc_send_cmd_reset(struct hinfc_host *host, int chipselect) in hisi_nfc_send_cmd_reset() argument
337 | ((chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_reset()
347 static void hisi_nfc_select_chip(struct nand_chip *chip, int chipselect) in hisi_nfc_select_chip() argument
351 if (chipselect < 0) in hisi_nfc_select_chip()
354 host->chipselect = chipselect; in hisi_nfc_select_chip()
[all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| H A D | fsl,ifc.yaml | 29 Should be either two or three. The first cell is the chipselect
30 number, and the remaining cells are the offset into the chipselect.
35 Either one or two, depending on how large each chipselect can be.
57 Each range corresponds to a single chipselect, and covers the entire
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | renesas,rcar-gyroadc.yaml | 13 The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
72 operation, single MB88101A is required. The Cx chipselect lines
81 A 3:8 chipselect demuxer is required to connect the nCS line
89 A 3:8 chipselect demuxer is required to connect the nCS line
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | spear_spics.txt | 5 PL022 control. If chipselect remain under PL022 control then they would be
12 directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
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| /linux/include/linux/spi/ |
| H A D | spi.h | 137 * @chip_select: Array of physical chipselect, spi->chipselect[i] gives
141 * The "active low" default for chipselect mode can be overridden
163 * @cs_gpiod: Array of GPIO descriptors of the corresponding chipselect lines
173 * @cs_index_mask: Bit mask of the active chipselect(s) in the chipselect array
229 /* Bit mask of the chipselect(s) that the driver need to use from
230 * the chipselect array.When the controller is capable to handle
241 * - chipselect delays
295 static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect) in spi_set_chipselect() argument
297 spi->chip_select[idx] = chipselect; in spi_set_chipselect()
396 * each slave has a chipselect signal, but it's common that not
[all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ti-aemif.txt | 73 - ti,cs-chipselect: number of chipselect. Indicates on the aemif driver
74 which chipselect is used for accessing the memory. For
163 ti,cs-chipselect = <2>;
192 ti,cs-chipselect = <0>;
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| /linux/drivers/gpio/ |
| H A D | gpio-spear-spics.c | 3 * SPEAr platform SPI chipselect abstraction over gpiolib
25 * It provides control for spi chip select lines so that any chipselect
35 * @cs_value_bit: bit to program high or low chipselect
36 * @cs_enable_mask: mask to select bits required to select chipselect
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-mcp23s08.txt | 26 SPI uses this to specify the chipselect line which the chip is
28 multiple chips on the same chipselect. Have a look at
35 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
39 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
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| /linux/arch/mips/bcm63xx/ |
| H A D | cs.c | 32 * Configure chipselect base address and size (bytes).
64 * configure chipselect timing (ns)
92 * configure other chipselect parameter (data bus size, ...)
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| /linux/drivers/mmc/host/ |
| H A D | mmc_spi.c | 43 * - MMC depends on a different chipselect management policy than the
45 * to issue multiple spi_message requests with the chipselect active,
51 * - We tell the controller to keep the chipselect active from the
55 * However, many cards seem OK with chipselect flapping up/down
140 /* chipselect will always be inactive after setup() */ in mmc_cs_off()
384 /* disable chipselect on errors and some success cases */ in mmc_spi_response_get()
482 /* send command, leaving chipselect active */ in mmc_spi_command_send()
499 /* after no-data commands and STOP_TRANSMISSION, chipselect off */ in mmc_spi_command_send()
681 * before dropping chipselect.
990 * Do a burst with chipselect active-high. We need to do this to in mmc_spi_initsequence()
[all …]
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| /linux/sound/pci/ice1712/ |
| H A D | revo.h | 33 #define VT1724_REVO_CS0 0x10 /* AK5365 chipselect for (revo51) */
34 #define VT1724_REVO_CS1 0x20 /* front AKM4381 chipselect */
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| /linux/include/linux/platform_data/ |
| H A D | spi-s3c64xx.h | 16 * struct s3c64xx_spi_csinfo - ChipSelect description
20 * This is per SPI-Slave Chipselect information.
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-gpio.yaml | 36 description: GPIOs to use for chipselect lines.
42 description: Number of chipselect lines. Should be <0> if a single device
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| /linux/drivers/mtd/spi-nor/controllers/ |
| H A D | hisi-sfc.c | 83 u32 chipselect; member
192 reg = OP_CFG_FM_CS(priv->chipselect); in hisi_spi_nor_op_reg()
248 reg = OP_CFG_FM_CS(priv->chipselect); in hisi_spi_nor_dma_transfer()
353 ret = of_property_read_u32(np, "reg", &priv->chipselect); in hisi_spi_nor_register()
408 dev_warn(dev, "Flash device number exceeds the maximum chipselect number\n"); in hisi_spi_nor_register_all()
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| /linux/arch/powerpc/boot/dts/ |
| H A D | ac14xx.dts | 105 chipselect = <2 0x00009000 0x00009100>;
112 chipselect = <6 0x00009000 0x00009100>;
120 chipselect = <3 0x00101140 0x00203100>;
128 chipselect = <5 0x00009000 0x00009100>;
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| /linux/include/uapi/linux/spi/ |
| H A D | spi.h | 16 #define SPI_CS_HIGH _BITUL(2) /* chipselect active high? */
20 #define SPI_NO_CS _BITUL(6) /* 1 dev/bus, no chipselect */
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| /linux/drivers/bus/ |
| H A D | qcom-ebi2.c | 103 * struct cs_data - struct with info on a chipselect setting
104 * @enable_mask: mask to enable the chipselect in the EBI2 config
354 /* Figure out the chipselect */ in qcom_ebi2_probe()
363 "invalid chipselect %u, we only support 0-5\n", in qcom_ebi2_probe()
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| /linux/Documentation/spi/ |
| H A D | spidev.rst | 74 For a SPI device with chipselect C on bus B, you should see:
113 the chipselect is deactivated between those operations. Full-duplex access,
114 and composite operation without chipselect de-activation, is available using
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| /linux/arch/arm/boot/dts/ti/keystone/ |
| H A D | keystone-k2l-evm.dts | 67 ti,cs-chipselect = <0>;
84 ti,davinci-chipselect = <0>;
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| H A D | keystone-k2e-evm.dts | 94 ti,cs-chipselect = <0>;
111 ti,davinci-chipselect = <0>;
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