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/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Dibm-power11-quad.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
125 #address-cells = <2>;
126 #size-cells = <0>;
128 bus-frequency = <100000000>;
129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
133 #address-cells = <1>;
134 #size-cells = <1>;
135 chip-id = <0>;
138 compatible = "ibm,p9-scom";
143 compatible = "ibm,i2c-fsi";
[all …]
H A Daspeed-bmc-ibm-fuji.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include "aspeed-g6.dtsi"
9 #include "ibm-power11-quad.dtsi"
13 compatible = "ibm,fuji-bmc", "aspeed,ast2600";
170 stdout-path = &uart5;
178 reserved-memory {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dsprd,spi-adi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
16 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
21 48 hardware channels to access analog chip. For 2 software read/write channels,
[all …]
H A Dspi-sprd-adi.txt3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
19 the analog chip address where user want to access by hardware components.
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
[all …]
/freebsd/sys/dev/bhnd/
H A Dbhnd_match.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
50 .m.match._name = (_src)->m.match._name, \
51 ._name = (_src)->_name
62 ((_m)->start == BHND_HWREV_INVALID && (_m)->end == BHND_HWREV_INVALID)
116 uint16_t core_id; /**< required core ID */
147 * A bhnd(4) chip match descriptor.
164 uint16_t chip_id; /**< required chip id */
165 struct bhnd_hwrev_match chip_rev; /**< matching chip revisions */
[all …]
/freebsd/sys/dev/ata/chipsets/
H A Data-sis.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
48 #include <dev/ata/ata-all.h>
49 #include <dev/ata/ata-pci.h>
84 { ATA_SIS745, 0x00, SIS_100NEW, 0, ATA_UDMA5, "745" }, /* 1chip */ in ata_sis_probe()
85 { ATA_SIS735, 0x00, SIS_100NEW, 0, ATA_UDMA5, "735" }, /* 1chip */ in ata_sis_probe()
86 { ATA_SIS733, 0x00, SIS_100NEW, 0, ATA_UDMA5, "733" }, /* 1chip */ in ata_sis_probe()
87 { ATA_SIS730, 0x00, SIS_100OLD, 0, ATA_UDMA5, "730" }, /* 1chip */ in ata_sis_probe()
89 { ATA_SIS635, 0x00, SIS_100NEW, 0, ATA_UDMA5, "635" }, /* 1chip */ in ata_sis_probe()
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/freebsd/share/man/man9/
H A Dbhnd.91 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
334 .Fa "const struct bhnd_chipid *chip" "const struct bhnd_chip_match *desc"
375 .Fa "chip" "hwrev" "flags"
390 .Fa "chip" "pkg" "flags"
392 .Bd -literal
398 .Bd -literal
406 .Bd -literal
414 .Bd -literal
417 .Bd -literal
427 .Bd -literal
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/freebsd/sys/contrib/dev/rtw88/
H A Drtw88xxa.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
34 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8812a_read_amplifier_type()
36 efuse->ext_pa_2g = (efuse->pa_type_2g & BIT(5)) && in rtw8812a_read_amplifier_type()
37 (efuse->pa_type_2g & BIT(4)); in rtw8812a_read_amplifier_type()
38 efuse->ext_lna_2g = (efuse->lna_type_2g & BIT(7)) && in rtw8812a_read_amplifier_type()
39 (efuse->lna_type_2g & BIT(3)); in rtw8812a_read_amplifier_type()
41 efuse->ext_pa_5g = (efuse->pa_type_5g & BIT(1)) && in rtw8812a_read_amplifier_type()
42 (efuse->pa_type_5g & BIT(0)); in rtw8812a_read_amplifier_type()
43 efuse->ext_lna_5g = (efuse->lna_type_5g & BIT(7)) && in rtw8812a_read_amplifier_type()
44 (efuse->lna_type_5g & BIT(3)); in rtw8812a_read_amplifier_type()
[all …]
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
33 struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; in rtw_usb_fill_tx_checksum()
34 struct rtw_dev *rtwdev = rtwusb->rtwdev; in rtw_usb_fill_tx_checksum()
37 le32p_replace_bits(&tx_desc->w7, agg_num, RTW_TX_DESC_W7_DMA_TXAGG_NUM); in rtw_usb_fill_tx_checksum()
38 pkt_info.pkt_offset = le32_get_bits(tx_desc->w1, RTW_TX_DESC_W1_PKT_OFFSET); in rtw_usb_fill_tx_checksum()
39 rtw_tx_fill_txdesc_checksum(rtwdev, &pkt_info, skb->data); in rtw_usb_fill_tx_checksum()
45 struct usb_device *udev = rtwusb->udev; in rtw_usb_reg_sec()
67 if (status != t_len && status != -ENODEV) in rtw_usb_reg_sec()
75 struct usb_device *udev = rtwusb->udev; in rtw_usb_read()
[all …]
H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
94 return -ETIMEDOUT; in rtw_mac_pre_system_cfg()
107 return -EINVAL; in rtw_mac_pre_system_cfg()
156 if (cmd->base == RTW_PWR_ADDR_SDIO) in rtw_pwr_cmd_polling()
157 offset = cmd->offset | SDIO_LOCAL_OFFSET; in rtw_pwr_cmd_polling()
159 offset = cmd->offset; in rtw_pwr_cmd_polling()
161 if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value)) in rtw_pwr_cmd_polling()
169 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
173 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
[all …]
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
55 return skb->priority; in rtw_pci_get_tx_qsel()
61 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; in rtw_pci_read8()
64 return readb(rtwpci->mmap + addr); in rtw_pci_read8()
68 val = bus_read_1((struct resource *)rtwpci->mmap, addr); in rtw_pci_read8()
69 rtw_dbg(rtwdev, RTW_DBG_IO_RW, "R08 (%#010x) -> %#04x\n", addr, val); in rtw_pci_read8()
76 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; in rtw_pci_read16()
79 return readw(rtwpci->mmap + addr); in rtw_pci_read16()
83 val = bus_read_2((struct resource *)rtwpci->mmap, addr); in rtw_pci_read16()
[all …]
H A Dfw.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
71 val = rtw_read32_mask(rtwdev, reg->addr, reg->mask); in _rtw_fw_dump_dbg_info()
74 reg->desc, reg->addr, reg->mask, val); in _rtw_fw_dump_dbg_info()
100 sub_cmd_id = c2h->payload[0]; in rtw_fw_c2h_cmd_handle_ext()
148 struct rtw_c2h_ra_rpt *ra_rpt = (struct rtw_c2h_ra_rpt *)ra_data->payload; in rtw_fw_ra_report_iter()
149 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; in rtw_fw_ra_report_iter()
154 mac_id = ra_rpt->mac_id; in rtw_fw_ra_report_iter()
155 if (si->mac_id != mac_id) in rtw_fw_ra_report_iter()
158 si->ra_report.txrate.flags = 0; in rtw_fw_ra_report_iter()
[all …]
/freebsd/sys/dev/pci/
H A Dpci_user.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
70 u_int16_t pc_subvendor; /* card vendor ID */
71 u_int16_t pc_subdevice; /* card device ID, assigned by
73 u_int16_t pc_vendor; /* chip vendor ID */
74 u_int16_t pc_device; /* chip device ID, assigned by
75 chip vendor */
76 u_int8_t pc_class; /* chip PCI class */
77 u_int8_t pc_subclass; /* chip PCI subclass */
78 u_int8_t pc_progif; /* chip PCI programming interface */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
13 amount of individual LPDDR chips and the ranks per chip.
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
[all …]
/freebsd/sys/sys/
H A Dpciio.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
68 u_int16_t pc_subvendor; /* card vendor ID */
69 u_int16_t pc_subdevice; /* card device ID, assigned by
71 u_int16_t pc_vendor; /* chip vendor ID */
72 u_int16_t pc_device; /* chip device ID, assigned by
73 chip vendor */
74 u_int8_t pc_class; /* chip PCI class */
75 u_int8_t pc_subclass; /* chip PCI subclass */
76 u_int8_t pc_progif; /* chip PCI programming interface */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Djedec,spi-nor.txt4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
7 manufacturer and name of the chip. A list of supported chip
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
10 be identified by the JEDEC READ ID opcode (0x9F).
12 Supported chip names:
50 The following chip names have been used historically to
52 JEDEC READ ID opcode (0x9F):
53 m25p05-nonjedec
54 m25p10-nonjedec
[all …]
H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
16 - #address-cells, #size-cells : Must be present if the device has
[all …]
H A Dst,stm32-fmc2-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
[all …]
H A Dnand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id
[all...]
/freebsd/sys/dev/sdio/
H A Dsdiodevs1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 * --------------------------------------------------------------------------
42 * List of TPLMID_MANF "vendor ID"s.
43 * Please sort by vendor ID ascending.
52 * --------------------------------------------------------------------------
53 * List of TPLMID_CARD "product ID"s.
59 product REALTEK RTW8723BS 0xb723 802.11bgn SDIO WLAN with Bluetooth 4.0 Single-Chip Controller
62 product REALTEK RTW8822BS 0xb822 802.11ac/abgn SDIO WLAN with Bluetooth 4.1 Single-Chip Controller
63 product REALTEK RTW8821CS 0xc821 802.11ac/abgn SDIO WLAN with Bluetooth 4.2 Single-Chip Controller
[all …]
/freebsd/sys/dev/aic7xxx/
H A Daic7xxx_pci.c1 /*-
6 * SPDX-License-Identifier: BSD-3-Clause
8 * Copyright (c) 1994-2001 Justin T. Gibbs.
9 * Copyright (c) 2000-2001 Adaptec Inc.
23 * 3. Neither the names of the above-listed copyright holders nor the names
44 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#78 $
54 uint64_t id;
61 uint64_t id; ahc_compose_id() local
151 DEVID_9005_TYPE(id) global() argument
157 DEVID_9005_MAXRATE(id) global() argument
163 DEVID_9005_MFUNC(id) global() argument
165 DEVID_9005_CLASS(id) global() argument
168 SUBID_9005_TYPE(id) global() argument
174 SUBID_9005_TYPE_KNOWN(id) global() argument
180 SUBID_9005_MAXRATE(id) global() argument
186 SUBID_9005_SEEPTYPE(id) global() argument
194 SUBID_9005_AUTOTERM(id) global() argument
199 SUBID_9005_NUMCHAN(id) global() argument
204 SUBID_9005_LEGACYCONN(id) global() argument
209 SUBID_9005_MFUNCENB(id) global() argument
1060 u_int chip; ahc_ext_scbram_present() local
[all...]
/freebsd/sys/contrib/device-tree/Bindings/fsi/
H A Dfsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/fsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
18 "#address-cells":
21 "#size-cells":
24 '#interrupt-cells':
27 bus-frequency:
31 interrupt-controller: true
[all …]
H A Dfsi.txt4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
32 fsi-slave-engine@<addr> {
39 Note that since the bus is probe-able, some (or all) of the topology may
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id
[all...]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_power.c30 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_prep()
31 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_prep()
39 if (ahp->ah_mcast_filter_l32_set != 0) { in ar9300_wowoffload_post()
41 val &= ~ahp->ah_mcast_filter_l32_set; in ar9300_wowoffload_post()
44 if (ahp->ah_mcast_filter_u32_set != 0) { in ar9300_wowoffload_post()
46 val &= ~ahp->ah_mcast_filter_u32_set; in ar9300_wowoffload_post()
50 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_post()
51 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_post()
72 ahp->ah_mcast_filter_u32_set |= (1 << pos); in ar9300_wowoffload_add_mcast_filter()
74 ahp->ah_mcast_filter_l32_set |= (1 << pos); in ar9300_wowoffload_add_mcast_filter()
[all …]

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