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/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 You only need to enable this if you also want to enable
21 int "Maximum number of GPIOs for fast path"
50 this symbol, but new drivers should use the generic gpio-regmap
58 These checks help ensure that GPIOs have been properly initialized
60 non-sleeping contexts. They can make bitbanged serial protocols
69 Say Y here to add the legacy sysfs interface for GPIOs.
76 bool "Enable legacy functionalities of the sysfs interface"
80 Say Y here if you want to enable the legacy, global GPIO
81 numberspace-based functionalities of the sysfs interface.
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H A Dgpio-winbond.c1 // SPDX-License-Identifier: GPL-2.0+
24 /* global chip registers */
132 unsigned long gpios; member
145 return -EBUSY; in winbond_sio_enter()
149 * in order for chip to enter the "Extended Function Mode" in winbond_sio_enter()
206 * struct winbond_gpio_port_conflict - possibly conflicting device information
209 * is located (or WB_SIO_DEV_NONE - don't select any
226 * struct winbond_gpio_info - information about a particular GPIO port (device)
229 * @enablereg: port enable bit register number
230 * @enablebit: index of a port enable bit
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H A Dgpio-mpc5200.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * GPIO LIB API implementation for wakeup GPIOs.
32 * There's a maximum of 8 wakeup GPIOs. Which of these are available
35 * 0 -> GPIO_WKUP_7
36 * 1 -> GPIO_WKUP_6
37 * 2 -> PSC6_1
38 * 3 -> PSC6_0
39 * 4 -> ETH_17
40 * 5 -> PSC3_9
41 * 6 -> PSC2_4
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H A Dgpio-davinci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2007 David Brownell
43 #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
50 struct davinci_gpio_controller *chip; member
55 struct gpio_chip chip; member
73 /*--------------------------------------------------------------------------*/
75 /* board setup code *MUST* setup pinmux and enable the GPIO clock. */
76 static inline int __davinci_direction(struct gpio_chip *chip, in __davinci_direction() argument
79 struct davinci_gpio_controller *d = gpiochip_get_data(chip); in __davinci_direction()
86 g = d->regs[bank]; in __davinci_direction()
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H A Dgpio-rtd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * struct rtd_gpio_info - Specific GPIO register information
33 * @num_gpios: The number of GPIOs
37 * @ie_offset: Offset for GPIO interrupt enable registers
75 *reg_offset = info->deb_offset[offset / 8]; in rtd_gpio_get_deb_setval()
77 return info->deb_val[deb_index]; in rtd_gpio_get_deb_setval()
83 *reg_offset = info->deb_offset[0]; in rtd1295_misc_gpio_get_deb_setval()
85 return info->deb_val[deb_index]; in rtd1295_misc_gpio_get_deb_setval()
91 *reg_offset = info->deb_offset[0]; in rtd1295_iso_gpio_get_deb_setval()
93 return info->deb_val[deb_index]; in rtd1295_iso_gpio_get_deb_setval()
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H A Dgpio-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2005 Nokia Corporation
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
27 #include <linux/platform_data/gpio-omap.h>
61 struct gpio_chip chip; member
78 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
84 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
91 struct gpio_chip *chip = irq_data_get_irq_chip_data(d); in omap_irq_data_get_bank() local
92 return gpiochip_get_data(chip); in omap_irq_data_get_bank()
112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4377.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11 - Dragos Bogdan <dragos.bogdan@analog.com>
14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N
25 - adi,adf4377
26 - adi,adf4378
31 spi-max-frequency:
37 clock-names:
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/linux/drivers/video/fbdev/via/
H A Dvia-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/via-core.h>
13 #include "via-gpio.h"
16 * The ports we know about. Note that the port-25 gpios are not
29 .vg_name = "VGPIO0", /* Guess - not in datasheet */
69 * This structure controls the active GPIOs, which may be a subset
83 static int via_gpio_set(struct gpio_chip *chip, unsigned int nr, int value) in via_gpio_set() argument
85 struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip); in via_gpio_set()
90 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); in via_gpio_set()
91 gpio = cfg->active_gpios[nr]; in via_gpio_set()
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rt6245-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt6245-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT6245 is a high-performance, synchronous step-down converter
18 - $ref: regulator.yaml#
23 - richtek,rt6245
28 enable-gpios:
30 A connection of the chip 'enable' gpio line. If not provided,
[all …]
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
14 It is used to drive laser diode. There're two signals for chip controls
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dnuvoton,nau8315.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NAU8315/NAU8318 Mono Class-D Amplifier
10 - David Lin <CTLIN0@nuvoton.com>
13 - $ref: dai-common.yaml#
18 - nuvoton,nau8315
19 - nuvoton,nau8318
21 '#sound-dai-cells':
24 enable-gpios:
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dmelfas_mip4.txt4 - compatible: must be "melfas,mip4_ts"
5 - reg: I2C slave address of the chip (0x48 or 0x34)
6 - interrupts: interrupt to which the chip is connected
9 - ce-gpios: GPIO connected to the CE (chip enable) pin of the chip
16 interrupt-parent = <&gpio>;
18 ce-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
H A Dcypress,cy8ctma340.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Javier Martinez Canillas <javier@dowhile0.org>
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: touchscreen.yaml#
26 - const: cypress,cy8ctma340
27 - const: cypress,cy8ctst341
28 - const: cypress,cyttsp-spi
31 - const: cypress,cyttsp-i2c
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/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dnxp,88w8987-bt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
13 are used during FW download. To enable power save mode, the host
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
[all …]
H A Drealtek,bluetooth.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vasily Khoruzhick <anarsoul@gmail.com>
11 - Alistair Francis <alistair@alistair23.me>
14 RTL8723BS/RTL8723CS/RTL8821CS/RTL8822CS is a WiFi + BT chip. WiFi part
22 - enum:
23 - realtek,rtl8723bs-bt
24 - realtek,rtl8723cs-bt
25 - realtek,rtl8723ds-bt
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H A Damlogic,w155s2-bt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/bluetooth/amlogic,w155s2-bt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 The W155S2 is an Amlogic Bluetooth and Wi-Fi combo chip. It works on
12 the standard H4 protocol via a 4-wire UART interface, with baud rates
16 - Yang Li <yang.li@amlogic.com>
21 - items:
22 - enum:
23 - amlogic,w265s1-bt
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
29 description: used for power on chip control, POWER_EN pin D2.
32 reset-gpios:
33 description: used for reset chip control, RESET_N pin B7.
36 vdd10-supply:
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/linux/Documentation/devicetree/bindings/extcon/
H A Dextcon-max3355.txt1 Maxim Integrated MAX3355 USB OTG chip
2 -------------------------------------
4 MAX3355 integrates a charge pump and comparators to enable a system with an
5 integrated USB OTG dual-role transceiver to function as a USB OTG dual-role
9 - compatible: should be "maxim,max3355";
10 - maxim,shdn-gpios: should contain a phandle and GPIO specifier for the GPIO pin
12 - id-gpios: should contain a phandle and GPIO specifier for the GPIO pin
17 usb-otg {
19 maxim,shdn-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
20 id-gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
/linux/Documentation/devicetree/bindings/media/i2c/
H A Daptina,mt9v111.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
31 description: Enable signal, pin name "OE#". Active low.
34 standby-gpios:
39 reset-gpios:
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8183-kukui-jacuzzi-pico6.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi"
12 chassis-type = "convertible";
13 compatible = "google,pico-sku2", "google,pico", "mediatek,mt8183";
15 bt_wakeup: bt-wakeup {
16 compatible = "gpio-keys";
17 pinctrl-names = "default";
18 pinctrl-0 = <&bt_pins_wakeup>;
[all …]
/linux/drivers/platform/x86/
H A Dmeegopad_anx7428.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver to power on the Analogix ANX7428 USB Type-C crosspoint switch
4 * on MeeGoPad top-set boxes.
6 * The MeeGoPad T8 and T9 are Cherry Trail top-set boxes which
7 * use an ANX7428 to provide a Type-C port with USB3.1 Gen 1 and
8 * DisplayPort over Type-C alternate mode support.
12 * to send the right signal to the 4 highspeed pairs of the Type-C
16 * IOW the ANX7428 operates fully autonomous and to the x5-Z8350 SoC
17 * things look like there simply is a USB-3 Type-A connector and a
22 * It should be possible to tell the micro-controller which data- and/or
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/linux/drivers/pinctrl/intel/
H A Dpinctrl-lynxpoint.c1 // SPDX-License-Identifier: GPL-2.0
25 #include <linux/pinctrl/pinconf-generic.h>
30 #include "pinctrl-intel.h"
180 * Lynxpoint gpios are controlled through both bitmapped registers and
182 * 3 x 32bit registers to cover all 95 GPIOs
185 * (LP_CONFIG1 and LP_CONFIG2), with 95 GPIOs there's a total of
190 * LP_ACPI_OWNED[31:0] gpio ownerships for gpios 0-31 (bitmapped registers)
191 * LP_ACPI_OWNED[63:32] gpio ownerships for gpios 32-63
192 * LP_ACPI_OWNED[94:64] gpio ownerships for gpios 63-94
207 * IOxAPIC redirection map applies only for gpio 8-10, 13-14, 45-55.
[all …]

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