| /linux/drivers/gpio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 You only need to enable this if you also want to enable
18 int "Maximum number of GPIOs for fast path"
47 this symbol, but new drivers should use the generic gpio-regmap
55 These checks help ensure that GPIOs have been properly initialized
57 non-sleeping contexts. They can make bitbanged serial protocols
66 Say Y here to add the legacy sysfs interface for GPIOs.
77 for GPIOs. The character device allows userspace to control GPIOs
110 list of GPIO chip selects to mark a certain chip select as being
111 controlled the SPI device's internal chip select mechanism and not
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| H A D | gpiolib-of.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
26 #include "gpiolib-of.h"
29 * This is Linux-specific flags. By default controllers' and Linux' mapping
31 * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended.
44 * of_gpio_named_count() - Count GPIOs for a device
45 * @np: device node to count GPIOs for
48 * The function returns the count of GPIOs specified for a node.
52 * Either number of GPIOs defined in the property, or
53 * * %-EINVAL for an incorrectly formed "gpios" property, or
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| H A D | gpio-winbond.c | 1 // SPDX-License-Identifier: GPL-2.0+
24 /* global chip registers */
132 unsigned long gpios; member
145 return -EBUSY; in winbond_sio_enter()
149 * in order for chip to enter the "Extended Function Mode" in winbond_sio_enter()
206 * struct winbond_gpio_port_conflict - possibly conflicting device information
209 * is located (or WB_SIO_DEV_NONE - don't select any
226 * struct winbond_gpio_info - information about a particular GPIO port (device)
229 * @enablereg: port enable bit register number
230 * @enablebit: index of a port enable bit
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| H A D | gpio-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2007 David Brownell
43 #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
50 struct davinci_gpio_controller *chip; member
55 struct gpio_chip chip; member
82 /*--------------------------------------------------------------------------*/
84 /* board setup code *MUST* setup pinmux and enable the GPIO clock. */
85 static inline int __davinci_direction(struct gpio_chip *chip, in __davinci_direction() argument
88 struct davinci_gpio_controller *d = gpiochip_get_data(chip); in __davinci_direction()
95 g = d->regs[bank]; in __davinci_direction()
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| H A D | gpio-rtd.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * struct rtd_gpio_info - Specific GPIO register information
33 * @num_gpios: The number of GPIOs
37 * @ie_offset: Offset for GPIO interrupt enable registers
75 *reg_offset = info->deb_offset[offset / 8]; in rtd_gpio_get_deb_setval()
77 return info->deb_val[deb_index]; in rtd_gpio_get_deb_setval()
83 *reg_offset = info->deb_offset[0]; in rtd1295_misc_gpio_get_deb_setval()
85 return info->deb_val[deb_index]; in rtd1295_misc_gpio_get_deb_setval()
91 *reg_offset = info->deb_offset[0]; in rtd1295_iso_gpio_get_deb_setval()
93 return info->deb_val[deb_index]; in rtd1295_iso_gpio_get_deb_setval()
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| H A D | gpio-twl4030.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Access to GPIOs on TWL4030/TPS659x0 chips
5 * Copyright (C) 2006-2007 Texas Instruments, Inc.
8 * Code re-arranged and cleaned up by:
30 * The GPIO "subchip" supports 18 GPIOs which can be configured as
37 * There are also two LED pins used sometimes as output-only GPIOs.
52 /* Mask for GPIO registers when aggregated into a 32-bit integer */
66 /*----------------------------------------------------------------------*/
76 /*----------------------------------------------------------------------*/
101 /*----------------------------------------------------------------------*/
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| /linux/Documentation/devicetree/bindings/iio/frequency/ |
| H A D | adi,adf4377.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11 - Dragos Bogdan <dragos.bogdan@analog.com>
14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N
25 - adi,adf4377
26 - adi,adf4378
31 spi-max-frequency:
37 clock-names:
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| /linux/drivers/video/fbdev/via/ |
| H A D | via-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/via-core.h>
14 #include "via-gpio.h"
17 * The ports we know about. Note that the port-25 gpios are not
30 .vg_name = "VGPIO0", /* Guess - not in datasheet */
70 * This structure controls the active GPIOs, which may be a subset
84 static void via_gpio_set(struct gpio_chip *chip, unsigned int nr, in via_gpio_set() argument
87 struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip); in via_gpio_set()
92 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); in via_gpio_set()
93 gpio = cfg->active_gpios[nr]; in via_gpio_set()
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | sony,imx214.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sony 1/3.06-Inch 13.13MP CMOS Digital Image Sensor
10 - Ricardo Ribalda <ribalda@kernel.org>
13 The Sony IMX214 is a 1/3.06-inch CMOS active pixel digital image sensor with
15 interface. Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a
19 - $ref: /schemas/media/video-interface-devices.yaml#
27 - 0x10
28 - 0x1a
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| H A D | aptina,mt9v111.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
31 description: Enable signal, pin name "OE#". Active low.
34 standby-gpios:
39 reset-gpios:
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | spear_spics.txt | 10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
30 -------
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | richtek,rt6245-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt6245-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT6245 is a high-performance, synchronous step-down converter
18 - $ref: regulator.yaml#
23 - richtek,rt6245
28 enable-gpios:
30 A connection of the chip 'enable' gpio line. If not provided,
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| H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
14 It is used to drive laser diode. There're two signals for chip controls
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
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| /linux/Documentation/devicetree/bindings/input/touchscreen/ |
| H A D | melfas_mip4.txt | 4 - compatible: must be "melfas,mip4_ts"
5 - reg: I2C slave address of the chip (0x48 or 0x34)
6 - interrupts: interrupt to which the chip is connected
9 - ce-gpios: GPIO connected to the CE (chip enable) pin of the chip
16 interrupt-parent = <&gpio>;
18 ce-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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| H A D | cypress,cy8ctma340.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Javier Martinez Canillas <javier@dowhile0.org>
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: touchscreen.yaml#
26 - const: cypress,cy8ctma340
27 - const: cypress,cy8ctst341
28 - const: cypress,cyttsp-spi
31 - const: cypress,cyttsp-i2c
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | nuvoton,nau8315.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NAU8315/NAU8318 Mono Class-D Amplifier
10 - David Lin <CTLIN0@nuvoton.com>
13 - $ref: dai-common.yaml#
18 - nuvoton,nau8315
19 - nuvoton,nau8318
21 '#sound-dai-cells':
24 enable-gpios:
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | analogix,anx7625.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
29 description: used for power on chip control, POWER_EN pin D2.
32 reset-gpios:
33 description: used for reset chip control, RESET_N pin B7.
36 vdd10-supply:
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| /linux/Documentation/driver-api/gpio/ |
| H A D | board.rst | 5 This document explains how GPIOs can be assigned to given devices and functions.
7 All platforms can enable the GPIO library, but if the platform strictly
9 Kconfig. Then, how GPIOs are mapped depends on what the platform uses to
14 -----------
15 GPIOs can easily be mapped to devices and functions in the device tree. The
16 exact way to do it depends on the GPIO controller providing the GPIOs, see the
19 GPIOs mappings are defined in the consumer device's node, in a property named
20 <function>-gpios, where <function> is the function the driver will request
26 led-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>, /* red */
30 power-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | atmel-nand.txt | 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
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| /linux/Documentation/devicetree/bindings/net/bluetooth/ |
| H A D | realtek,bluetooth.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vasily Khoruzhick <anarsoul@gmail.com>
11 - Alistair Francis <alistair@alistair23.me>
14 RTL8723BS/RTL8723CS/RTL8821CS/RTL8822CS is a WiFi + BT chip. WiFi part
22 - enum:
23 - realtek,rtl8723bs-bt
24 - realtek,rtl8723cs-bt
25 - realtek,rtl8723ds-bt
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| H A D | amlogic,w155s2-bt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/bluetooth/amlogic,w155s2-bt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 The W155S2 is an Amlogic Bluetooth and Wi-Fi combo chip. It works on
12 the standard H4 protocol via a 4-wire UART interface, with baud rates
16 - Yang Li <yang.li@amlogic.com>
21 - items:
22 - enum:
23 - amlogic,w265s1-bt
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| /linux/Documentation/devicetree/bindings/misc/ |
| H A D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
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| /linux/Documentation/devicetree/bindings/extcon/ |
| H A D | extcon-max3355.txt | 1 Maxim Integrated MAX3355 USB OTG chip
2 -------------------------------------
4 MAX3355 integrates a charge pump and comparators to enable a system with an
5 integrated USB OTG dual-role transceiver to function as a USB OTG dual-role
9 - compatible: should be "maxim,max3355";
10 - maxim,shdn-gpios: should contain a phandle and GPIO specifier for the GPIO pin
12 - id-gpios: should contain a phandle and GPIO specifier for the GPIO pin
17 usb-otg {
19 maxim,shdn-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
20 id-gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8183-kukui-jacuzzi-pico6.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi"
12 chassis-type = "convertible";
13 compatible = "google,pico-sku2", "google,pico", "mediatek,mt8183";
15 bt_wakeup: bt-wakeup {
16 compatible = "gpio-keys";
17 pinctrl-names = "default";
18 pinctrl-0 = <&bt_pins_wakeup>;
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| /linux/drivers/platform/x86/ |
| H A D | meegopad_anx7428.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver to power on the Analogix ANX7428 USB Type-C crosspoint switch
4 * on MeeGoPad top-set boxes.
6 * The MeeGoPad T8 and T9 are Cherry Trail top-set boxes which
7 * use an ANX7428 to provide a Type-C port with USB3.1 Gen 1 and
8 * DisplayPort over Type-C alternate mode support.
12 * to send the right signal to the 4 highspeed pairs of the Type-C
16 * IOW the ANX7428 operates fully autonomous and to the x5-Z8350 SoC
17 * things look like there simply is a USB-3 Type-A connector and a
22 * It should be possible to tell the micro-controller which data- and/or
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