| /freebsd/contrib/wpa/src/common/ |
| H A D | hw_features_common.c | 3 * Copyright (c) 2002-2013, Jouni Malinen <j@w1.fi>
30 for (i = 0; i < mode->num_channels; i++) { in hw_get_channel_chan()
31 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_get_channel_chan()
32 if (ch->chan == chan) { in hw_get_channel_chan()
34 *freq = ch->freq; in hw_get_channel_chan()
48 for (i = 0; i < mode->num_channels; i++) { in hw_mode_get_channel()
49 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_mode_get_channel()
51 if (ch->freq == freq) { in hw_mode_get_channel()
53 *chan = ch->chan; in hw_mode_get_channel()
78 if (curr_mode->mode != mode) in hw_get_channel_freq()
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7915/ |
| H A D | eeprom.h | 1 /* SPDX-License-Identifier: ISC */
28 MT_EE_RATE_DELTA_6G_V2 = 0x884, /* 6g fields only appear in eeprom v2 */
48 #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(7, 6)
49 #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(7, 6)
58 #define MT_EE_RATE_DELTA_SIGN BIT(6)
103 mt7915_get_channel_group_5g(int channel, bool is_7976) in mt7915_get_channel_group_5g() argument
106 if (channel <= 64) in mt7915_get_channel_group_5g()
108 if (channel <= 96) in mt7915_get_channel_group_5g()
110 if (channel <= 128) in mt7915_get_channel_group_5g()
112 if (channel <= 144) in mt7915_get_channel_group_5g()
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analo
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| /freebsd/share/man/man4/ |
| H A D | pms.4 | 30 .Nd "PMC-Sierra PM8001/8081/8088/8089/8074/8076/8077 SAS/SATA HBA Controller driver"
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the PMC-Sierra PM8001/8081/8088/8089/8074/8076/8077
55 .Bl -bullet -compact
57 Tachyon TS Fibre Channel Card
59 Tachyon TL Fibre Channel Card
61 Tachyon XL2 Fibre Channel Card
63 Tachyon DX2 Fibre Channel Card
65 Tachyon DX2+ Fibre Channel Card
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| H A D | cd.4 | 31 .Nd SCSI CD-ROM driver
39 .Tn CD-ROM
40 (Compact Disc-Read Only Memory) drive.
44 .Tn CD-ROM .
48 .Tn CD-ROM
83 .Tn CD-ROM
87 .Tn CD-ROM
95 .Tn CD-ROM
101 .Bl -tag -width CDIOCREADSUBCHANNEL
106 .Bd -literal -offset indent
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad4130.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
31 - const: mclk
36 interrupt-names:
42 - int
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| H A D | ti,ads131e08.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
24 - ti,ads131e04
25 - ti,ads131e06
26 - ti,ads131e08
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| H A D | qcom,spmi-vadc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - And
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| H A D | ti,tsc2046.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Oleksij Rempel <o.rempel@pengutronix.de>
18 - ti,tsc2046e-adc
26 vref-supply:
29 "#io-channel-cells":
32 '#address-cells':
35 '#size-cells':
39 - compatible
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| /freebsd/sys/dev/ic/ |
| H A D | cd1400.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * cyclades cyclom-y serial driver
45 #define CD1400_CAR 0x68 /* channel access */
46 #define CD1400_CAR_CHAN (3<<0) /* channel select */
48 #define CD1400_GCR_PARALLEL (1<<7) /* channel 0 is parallel */
53 #define CD1400_RICR 0x44 /* receive interrupting channel */
54 #define CD1400_TICR 0x45 /* transmit interrupting channel */
55 #define CD1400_MICR 0x46 /* modem interrupting channel */
58 #define CD1400_RIR_RBUSY (1<<6) /* rx service in progress */
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| /freebsd/sys/contrib/device-tree/Bindings/iio/dac/ |
| H A D | ad5592r.txt | 4 - compatible: Must be "adi,ad5592r"
5 - reg: SPI chip select number for the device
6 - spi-max-frequency: Max SPI frequency to use (< 30000000)
7 - spi-cpol: The AD5592R requires inverse clock polarity (CPOL) mode
10 - compatible: Must be "adi,ad5593r"
11 - reg: I2C address of the device
14 - #address-cells: Should be 1.
15 - #size-cells: Should be 0.
16 - channel nodes:
17 Each child node represents one channel and has the following
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| H A D | adi,ad5592r.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,ad5592r
16 - adi,ad5593r
21 spi-max-frequency:
24 spi-cpol: true
26 "#address-cells":
29 "#size-cells":
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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| H A D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jef
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| H A D | azoteq,iqs7222.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_radar.c | 32 #define AR9300_DFS_FIRPWR -28
35 #define AR9300_DFS_PRSSI 6
56 * Kquick-drop. The chip has only one chance to drop the gain which
60 /* 0.8-2us, 2-3 bursts,300-400 PRF, 10 pulses each */
62 /* 0.8-2us, 2-3 bursts, 400-1200 PRF, 15 pulses each */
63 {30, 2, 400, 1200, 2, 30, 7, 0, 5, 15, 0, 0, 0, 32}, /* Type 6 */
66 /* 0.8-5us, 200 300 PRF, 10 pulses */
73 /* 0.8-15us, 200-1600 PRF, 15 pulses */
76 /* 0.8-15us, 2300-4000 PRF, 25 pulses*/
79 /* 20-30us, 2000-4000 PRF, 20 pulses*/
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| /freebsd/sys/contrib/dev/iwlwifi/fw/api/ |
| H A D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - sca
391 u8 channel; global() member
859 struct iwl_scan_umac_chan_param channel; global() member
870 struct iwl_scan_umac_chan_param channel; global() member
884 struct iwl_scan_umac_chan_param channel; global() member
899 struct iwl_scan_umac_chan_param channel; global() member
914 struct iwl_scan_umac_chan_param channel; global() member
1162 u8 channel; global() member
1206 u8 channel; global() member
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| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-eeprom-parse.c | |
| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | stericsson,dma40.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsso
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| H A D | ste-dma40.txt | 4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
19 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | at91-natte.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller {
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-facebook-minipack.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-2
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| H A D | aspeed-bmc-ampere-mtjade.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-
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| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_edma.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
40 #define CERR_CAEI (1 << 6) /* Clear All Error Indicators */
42 #define CINT_CAIR (1 << 6) /* Clear All Interrupt Requests */
47 #define DMA_DCHPRI3 0x100 /* Channel n Priority */
48 #define DMA_DCHPRI2 0x101 /* Channel n Priority */
49 #define DMA_DCHPRI1 0x102 /* Channel n Priority */
50 #define DMA_DCHPRI0 0x103 /* Channel n Priority */
51 #define DMA_DCHPRI7 0x104 /* Channel n Priority */
52 #define DMA_DCHPRI6 0x105 /* Channel n Priority */
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| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | mpc8610_hpcd.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
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