Lines Matching +full:channel +full:- +full:6

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
40 #define	 CERR_CAEI	(1 << 6) /* Clear All Error Indicators */
42 #define	 CINT_CAIR	(1 << 6) /* Clear All Interrupt Requests */
47 #define	DMA_DCHPRI3	0x100	/* Channel n Priority */
48 #define	DMA_DCHPRI2	0x101	/* Channel n Priority */
49 #define	DMA_DCHPRI1	0x102	/* Channel n Priority */
50 #define	DMA_DCHPRI0	0x103	/* Channel n Priority */
51 #define	DMA_DCHPRI7	0x104	/* Channel n Priority */
52 #define	DMA_DCHPRI6	0x105	/* Channel n Priority */
53 #define	DMA_DCHPRI5	0x106	/* Channel n Priority */
54 #define	DMA_DCHPRI4	0x107	/* Channel n Priority */
55 #define	DMA_DCHPRI11	0x108	/* Channel n Priority */
56 #define	DMA_DCHPRI10	0x109	/* Channel n Priority */
57 #define	DMA_DCHPRI9	0x10A	/* Channel n Priority */
58 #define	DMA_DCHPRI8	0x10B	/* Channel n Priority */
59 #define	DMA_DCHPRI15	0x10C	/* Channel n Priority */
60 #define	DMA_DCHPRI14	0x10D	/* Channel n Priority */
61 #define	DMA_DCHPRI13	0x10E	/* Channel n Priority */
62 #define	DMA_DCHPRI12	0x10F	/* Channel n Priority */
63 #define	DMA_DCHPRI19	0x110	/* Channel n Priority */
64 #define	DMA_DCHPRI18	0x111	/* Channel n Priority */
65 #define	DMA_DCHPRI17	0x112	/* Channel n Priority */
66 #define	DMA_DCHPRI16	0x113	/* Channel n Priority */
67 #define	DMA_DCHPRI23	0x114	/* Channel n Priority */
68 #define	DMA_DCHPRI22	0x115	/* Channel n Priority */
69 #define	DMA_DCHPRI21	0x116	/* Channel n Priority */
70 #define	DMA_DCHPRI20	0x117	/* Channel n Priority */
71 #define	DMA_DCHPRI27	0x118	/* Channel n Priority */
72 #define	DMA_DCHPRI26	0x119	/* Channel n Priority */
73 #define	DMA_DCHPRI25	0x11A	/* Channel n Priority */
74 #define	DMA_DCHPRI24	0x11B	/* Channel n Priority */
75 #define	DMA_DCHPRI31	0x11C	/* Channel n Priority */
76 #define	DMA_DCHPRI30	0x11D	/* Channel n Priority */
77 #define	DMA_DCHPRI29	0x11E	/* Channel n Priority */
78 #define	DMA_DCHPRI28	0x11F	/* Channel n Priority */
102 #define	TCD_CSR_ACTIVE			(1 << 6)
112 	bus_space_read_4(_sc->bst_tcd, _sc->bsh_tcd, _reg)
114 	bus_space_write_4(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
116 	bus_space_read_2(_sc->bst_tcd, _sc->bsh_tcd, _reg)
118 	bus_space_write_2(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
120 	bus_space_read_1(_sc->bst_tcd, _sc->bsh_tcd, _reg)
122 	bus_space_write_1(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
144 	uint32_t	channel;  member