/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
H A D | rate.c | 46 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00, 49 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08, 52 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A, 55 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10, 58 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12, 61 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19, 64 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A, 67 {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C, 70 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40, 73 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48, [all …]
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/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/ |
H A D | htb.json | 102 … "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 20Kbit burst 1000b cburst 1600b", 124 … "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 20Kbit burst 1600b cburst 1600b", 146 … "matchPattern": "class htb 1:1 root prio 1 rate 20Kbit ceil 20Kbit burst 1600b cburst 1600b", 154 "name": "Create HTB with class ceil setting", 165 … "cmdUnderTest": "$TC class add dev $DUMMY parent 1: classid 1:1 htb rate 20Kbit ceil 10Kbit", 168 … "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 10Kbit burst 1600b cburst 1600b", 190 … "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 20Kbit burst 1600b cburst 2000b", 212 "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 20Kbit burst 2Kb cburst 2Kb", 234 … "matchPattern": "class htb 1:1 root prio 0 rate 20Kbit ceil 20Kbit burst 1600b cburst 1600b",
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/linux/drivers/net/ethernet/mellanox/mlx5/core/en/ |
H A D | htb.c | 270 qos_dbg(htb->mdev, "Convert: rate %llu, parent ceil %llu -> bw_share %u\n", in mlx5e_htb_convert_rate() 276 static void mlx5e_htb_convert_ceil(struct mlx5e_htb *htb, u64 ceil, u32 *max_average_bw) in mlx5e_htb_convert_ceil() argument 279 *max_average_bw = max_t(u32, div_u64(ceil, BYTES_IN_MBIT), 1); in mlx5e_htb_convert_ceil() 281 qos_dbg(htb->mdev, "Convert: ceil %llu -> max_average_bw %u\n", in mlx5e_htb_convert_ceil() 282 ceil, *max_average_bw); in mlx5e_htb_convert_ceil() 287 u32 parent_classid, u64 rate, u64 ceil, in mlx5e_htb_leaf_alloc_queue() argument 295 qos_dbg(htb->mdev, "TC_HTB_LEAF_ALLOC_QUEUE classid %04x, parent %04x, rate %llu, ceil %llu\n", in mlx5e_htb_leaf_alloc_queue() 296 classid, parent_classid, rate, ceil); in mlx5e_htb_leaf_alloc_queue() 314 mlx5e_htb_convert_ceil(htb, ceil, &node->max_average_bw); in mlx5e_htb_leaf_alloc_queue() 343 u64 rate, u64 ceil, struct netlink_ext_ack *extack) in mlx5e_htb_leaf_to_inner() argument [all …]
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H A D | htb.h | 26 u32 parent_classid, u64 rate, u64 ceil, 30 u64 rate, u64 ceil, struct netlink_ext_ack *extack); 37 mlx5e_htb_node_modify(struct mlx5e_htb *htb, u16 classid, u64 rate, u64 ceil,
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H A D | qos.c | 425 htb_qopt->rate, htb_qopt->ceil, htb_qopt->extack); in mlx5e_htb_setup_tc() 432 htb_qopt->rate, htb_qopt->ceil, htb_qopt->extack); in mlx5e_htb_setup_tc() 441 return mlx5e_htb_node_modify(htb, htb_qopt->classid, htb_qopt->rate, htb_qopt->ceil, in mlx5e_htb_setup_tc()
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/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn32/ |
H A D | dcn32_dpp.c | 54 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl32_calc_lb_num_partitions() 55 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl32_calc_lb_num_partitions() 56 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl32_calc_lb_num_partitions() 187 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl32_spl_calc_lb_num_partitions() 188 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl32_spl_calc_lb_num_partitions() 189 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl32_spl_calc_lb_num_partitions()
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/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
H A D | dcn401_dpp.c | 303 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl401_calc_lb_num_partitions() 304 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl401_calc_lb_num_partitions() 305 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl401_calc_lb_num_partitions() 378 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl401_spl_calc_lb_num_partitions() 379 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl401_spl_calc_lb_num_partitions() 380 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl401_spl_calc_lb_num_partitions()
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/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
H A D | dcn20_dpp.c | 280 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl2_calc_lb_num_partitions() 281 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl2_calc_lb_num_partitions() 282 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl2_calc_lb_num_partitions() 457 memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */ in dscl2_spl_calc_lb_num_partitions() 458 memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */ in dscl2_spl_calc_lb_num_partitions() 459 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dscl2_spl_calc_lb_num_partitions()
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/linux/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 349 #define UTCR1_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ 352 #define UTCR2_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ 355 /* fua = fxtl/(16*Ceil (Div/16)) */ 356 /* Tua = 16*Ceil (Div/16)*Txtl */ 488 #define SDCR3_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ 491 #define SDCR4_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ 494 /* fsd = fxtl/(16*Ceil (Div/16)) */ 495 /* Tsd = 16*Ceil (Div/16)*Txtl */ 646 #define MCCR0_CeilAudSmpDiv(Div) /* Ceil. of AudSmpDiv [192..4064] */ \ 648 /* faud = fmc/(32*Ceil (Div/32)) */ [all …]
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/linux/fs/bcachefs/ |
H A D | util.c | 656 u64 bch2_get_random_u64_below(u64 ceil) in bch2_get_random_u64_below() argument 658 if (ceil <= U32_MAX) in bch2_get_random_u64_below() 659 return __get_random_u32_below(ceil); in bch2_get_random_u64_below() 663 u64 mult = ceil * rand; in bch2_get_random_u64_below() 665 if (unlikely(mult < ceil)) { in bch2_get_random_u64_below() 666 u64 bound = -ceil % ceil; in bch2_get_random_u64_below() 669 mult = ceil * rand; in bch2_get_random_u64_below() 673 return mul_u64_u64_shr(ceil, rand, 64); in bch2_get_random_u64_below()
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/linux/lib/math/ |
H A D | reciprocal_div.c | 41 /* ceil(log2(d)) */ in reciprocal_value_adv() 48 "ceil(log2(0x%08x)) == 32, %s doesn't support such divisor", in reciprocal_value_adv()
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/linux/drivers/char/ |
H A D | random.c | 191 * u32 get_random_u32_below(u32 ceil) 193 * u32 get_random_u32_inclusive(u32 floor, u32 ceil) 556 u32 __get_random_u32_below(u32 ceil) in DEFINE_BATCHED_ENTROPY() 559 * This is the slow path for variable ceil. It is still fast, most of in DEFINE_BATCHED_ENTROPY() 561 * opportunistically comparing the lower half to ceil itself, before in DEFINE_BATCHED_ENTROPY() 563 * whose lower half would indicate a range indivisible by ceil. The use in DEFINE_BATCHED_ENTROPY() 564 * of `-ceil % ceil` is analogous to `2^32 % ceil`, but is computable in DEFINE_BATCHED_ENTROPY() 571 * This function is technically undefined for ceil in DEFINE_BATCHED_ENTROPY() [all...] |
/linux/drivers/iio/light/ |
H A D | lv0104cs.c | 278 int floor, ceil, mid; in lv0104cs_set_calibscale() local 285 ceil = lv0104cs_calibscales[i + 1].val * 1000000 in lv0104cs_set_calibscale() 287 mid = (floor + ceil) / 2; in lv0104cs_set_calibscale() 296 if (calibscale >= mid && calibscale <= ceil) { in lv0104cs_set_calibscale()
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/linux/drivers/clk/tegra/ |
H A D | clk-device.c | 47 dev_dbg(dev, "failed to find ceil OPP for %luHz\n", rate); in tegra_clock_set_pd_state() 140 * state. For some clocks common OPP helper may fail to find ceil in tegra_clock_probe()
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/linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
H A D | qos.h | 60 u64 ceil; member
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/linux/drivers/gpu/drm/amd/display/modules/freesync/ |
H A D | freesync.c | 328 * the render time interval - take ceil of this value in apply_below_the_range() 363 * - Delta for CEIL: delta_from_mid_point_in_us_1 in apply_below_the_range() 370 * If using CEIL produces a value that is out of range, in apply_below_the_range() 376 * choose to use CEIL in apply_below_the_range() 380 /* If choosing CEIL results in a frame duration that is in apply_below_the_range() 382 * Choose CEIL in apply_below_the_range()
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/linux/drivers/media/platform/ti/omap3isp/ |
H A D | ispcsiphy.c | 223 /* THS_TERM: Programmed value = ceil(12.5 ns/DDRClk period) - 1. */ in omap3isp_csiphy_config() 226 /* THS_SETTLE: Programmed value = ceil(90 ns/DDRClk period) + 3. */ in omap3isp_csiphy_config()
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/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
H A D | dcn10_dpp_dscl.c | 413 memory_line_size_y = (line_size * lb_bpc + 71) / 72; /* +71 to ceil */ in dpp1_dscl_calc_lb_num_partitions() 414 memory_line_size_c = (line_size_c * lb_bpc + 71) / 72; /* +71 to ceil */ in dpp1_dscl_calc_lb_num_partitions() 415 memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */ in dpp1_dscl_calc_lb_num_partitions()
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/linux/include/linux/ |
H A D | reciprocal_div.h | 47 * ceil(log2(d)) result will be 32 which then requires u128 divide on host. The
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/linux/drivers/net/ethernet/sfc/siena/ |
H A D | rx_common.h | 17 /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
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/linux/drivers/net/ethernet/sfc/ |
H A D | rx_common.h | 17 /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
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/linux/Documentation/devicetree/bindings/ptp/ |
H A D | fsl,ptp.yaml | 94 tmr_add = ceil(2^32 / FreqDivRatio)
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/linux/drivers/ufs/host/ |
H A D | ufs-qcom.h | 237 #define ceil(freq, div) ((freq) % (div) == 0 ? ((freq)/(div)) : ((freq)/(div) + 1)) macro
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/linux/drivers/pwm/ |
H A D | pwm-bcm2835.c | 82 * <=> period <= ceil((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate) - 1 in bcm2835_pwm_apply()
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/linux/Documentation/translations/zh_CN/power/ |
H A D | opp.rst | 75 dev_pm_opp_find_freq_{ceil, floor}, dev_pm_opp_get_voltage,
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