/linux/Documentation/devicetree/bindings/x86/ |
H A D | ce4100.txt | 1 CE4100 Device Tree Bindings 4 The CE4100 SoC uses for in core peripherals the following compatible 6 Many of the "generic" devices like HPET or IO APIC have the ce4100 19 compatible = "intel,ce4100"; 25 compatible = "intel,ce4100"; 45 compatible = "intel,ce4100-cp"; 50 compatible = "intel,ce4100-pci", "pci";
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H A D | timer.txt | 6 compatible = "intel,ce4100-hpet";
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/linux/arch/x86/platform/ce4100/ |
H A D | falconfalls.dts | 3 * CE4100 on Falcon Falls 20 compatible = "intel,ce4100"; 29 compatible = "intel,ce4100-cp"; 34 compatible = "intel,ce4100-ioapic"; 40 compatible = "intel,ce4100-hpet"; 45 compatible = "intel,ce4100-lapic"; 52 compatible = "intel,ce4100-pci", "pci"; 62 compatible = "intel,ce4100-ioapic"; 71 compatible = "intel,ce4100-pci", "pci"; 240 compatible = "intel,ce4100-i2c-controller"; [all …]
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H A D | ce4100.c | 3 * Intel CE4100 platform specific setup code 14 #include <asm/ce4100.h> 23 * The CE4100 platform has an internal 8051 Microcontroller which is 133 * CE4100 specific x86_init function overrides and early setup 147 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue in x86_ce4100_early_setup()
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H A D | Makefile | 2 obj-$(CONFIG_X86_INTEL_CE) += ce4100.o
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | intel,ce4100-ioapic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml# 23 the ce4100 name in their compatible property names because they 24 first appeared in CE4100 SoC. 32 const: intel,ce4100-ioapic 56 compatible = "intel,ce4100-ioapic";
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H A D | intel,ce4100-lapic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml# 23 the ce4100 name in their compatible property names because they 24 first appeared in CE4100 SoC. 32 const: intel,ce4100-lapic 66 compatible = "intel,ce4100-lapic";
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-pxa-pci-ce4100.txt | 1 CE4100 I2C 4 CE4100 has one PCI device which is described as the I2C-Controller. This 55 compatible = "intel,ce4100-i2c-controller"; 68 compatible = "intel,ce4100-i2c-controller"; 83 compatible = "intel,ce4100-i2c-controller";
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/linux/arch/x86/kernel/ |
H A D | devicetree.c | 42 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 45 { .compatible = "intel,ce4100-cp", }, 116 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet() 153 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup() 261 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") in dtb_ioapic_setup()
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/linux/drivers/i2c/busses/ |
H A D | i2c-pxa-pci.c | 3 * CE4100 PCI-I2C glue code for PXA's driver 6 * The CE4100's I2C device is more or less the same one as found on PXA. 72 pdev = platform_device_alloc("ce4100-i2c", devnum); in add_i2c_device()
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H A D | i2c-pxa.c | 218 { "ce4100-i2c", REGS_CE4100 },
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | sodaville.txt | 1 GPIO controller on CE4100 / Sodaville SoCs 4 The bindings for CE4100's GPIO controller match the generic description
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/linux/drivers/spi/ |
H A D | spi-pxa2xx-pci.c | 4 * CE4100's SPI device is more or less the same one as found on PXA. 326 { PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) }, 347 MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
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/linux/arch/x86/platform/ |
H A D | Makefile | 4 obj-y += ce4100/
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/linux/arch/x86/pci/ |
H A D | Makefile | 14 obj-$(CONFIG_X86_INTEL_CE) += ce4100.o
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H A D | ce4100.c | 11 * the CE4100. Each register can be assigned a private init, read and 21 #include <asm/ce4100.h>
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | marvell,mmp2-ssp.yaml | 17 - mrvl,ce4100-ssp
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/linux/arch/x86/ |
H A D | Kconfig | 554 Intel CE media processor (CE4100) SoC 646 bool "CE4100 TV platform" 656 Select for the Intel CE media processor (CE4100) SOC. 657 This option compiles in support for the CE4100 SOC for settop
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/linux/arch/x86/kernel/apic/ |
H A D | vector.c | 670 "intel,ce4100-ioapic"); in x86_fwspec_is_ioapic()
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/linux/drivers/net/ethernet/intel/e1000/ |
H A D | e1000_hw.h | 806 /* Auxiliary Control Register. This register is CE4100 specific,
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H A D | e1000_main.c | 2393 * sequence error interrupt (except on intel ce4100). in e1000_has_link()
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