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/linux/drivers/net/can/rockchip/
H A Drockchip_canfd.h367 * canfdtest -evx -g can0
370 * canfdtest -evx can0
371 * ethtool -S can0
408 * cansend can0 002##01f
416 * cansend can0 002##07217010000000000
428 * cangen can0 -I 1 -Li -Di -p10 -g 0.3
431 * cangen can0 -I2 -L1 -Di -p10 -c10 -g 1 -e
440 * sleep 3 && cangen can0 -I2 -Li -Di -p10 -g 0.0
442 * cangen can0 -I2 -Li -Di -p10 -g 0.05
/linux/Documentation/networking/device_drivers/can/freescale/
H A Dflexcan.rst52 ip link set dev can0 down
53 ethtool --set-priv-flags can0 rx-rtr {off|on}
54 ip link set dev can0 up
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-at9123 echo 0x7ff > /sys/class/net/can0/mb0_id
27 echo 0x9fffffff > /sys/class/net/can0/mb0_id
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_can.dtsi16 can0 {
34 can0: can@f000c000 { label
H A Dat91sam9x5_can.dtsi15 can0: can@f8000000 { label
38 can0 {
H A Dat91-sam9x60_curiosity.dts110 &can0 {
125 status = "okay"; /* Conflict with can0. */
266 can0 {
267 pinctrl_can0_rx_tx: can0-rx-tx {
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt45 256: can0 reset
47 258: can0 ref reset
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnxp,s32g2-siul2-pinctrl.yaml187 llce-can0-pins {
188 llce-can0-grp0 {
194 llce-can0-grp1 {
H A Dmicrochip,pic64gx-pinctrl-gpio2.yaml36 enum: [ mdio0, mdio1, spi0, can0, pcie, qspi, uart3, uart4, can1, uart2, gpio ]
42 enum: [ mdio0, mdio1, spi0, can0, pcie, qspi, uart3, uart4, can1, uart2,
H A Dloongson,ls2k-pinctrl.yaml42 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
47 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
H A Dpinctrl_spear.txt140 "can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2",
149 "i2c_4_5", "i2c_6_7", "can0", "can1", "pci", "sata", "ssp1", "gpt64"
/linux/arch/powerpc/boot/dts/fsl/
H A Dp1010si-pre.dtsi53 can0 = &can0;
/linux/drivers/pinctrl/
H A Dpinctrl-loongson2.c110 PMX_GROUP(can0, 0x0, 16),
125 SPECIFIC_GROUP(can0);
139 "can1", "can0",
152 FUNCTION(can0),
/linux/arch/mips/boot/dts/mobileye/
H A Deyeq5-pins.dtsi45 can0_pins: can0-pins {
46 function = "can0";
/linux/Documentation/devicetree/bindings/clock/
H A Dzynq-7000.txt60 19: can0
99 "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7792-wheat.dts147 can0_pins: can0 {
149 function = "can0";
191 &can0 {
H A Dr8a7792-blanche.dts260 can0_pins: can0 {
262 function = "can0";
316 &can0 {
/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi15 can0_pins: can0 {
21 can0-stb-hog {
H A Drzg2l-smarc-pinfunction.dtsi15 can0_pins: can0 {
21 can0-stb-hog {
/linux/arch/arm/boot/dts/st/
H A Dspear320-evb.dts60 can0 {
62 st,function = "can0";
/linux/Documentation/networking/
H A Dcan.rst311 strcpy(ifr.ifr_name, "can0" );
378 strcpy(ifr.ifr_name, "can0");
763 strcpy(ifr.ifr_name, "can0");
1160 $ ip -details link show can0
1166 $ ip link set dev can0 type can termination 120
1170 $ ip link set dev can0 type can termination 0
1190 - the CAN bus this CAN ID is transmitted on (e.g. can0)
1238 $ ip link set can0 type can help
1272 $ ip -details -statistics link show can0
1273 2: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UP qlen 10
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-dma.dtsi421 /* CAN0 clock and PD is shared among all CAN instances as
422 * CAN1 shares CAN0's clock and to enable CAN0's clock it
442 /* CAN0 clock and PD is shared among all CAN instances as
443 * CAN2 shares CAN0's clock and to enable CAN0's clock it
/linux/drivers/pinctrl/microchip/
H A Dpinctrl-mpfs-iomux0.c48 PINCTRL_PIN(4, "can0"),
92 MPFS_IOMUX0_GROUP(can0, BIT(4)),
129 MPFS_IOMUX0_FUNCTION(can0),
H A Dpinctrl-pic64gx-gpio2.c139 PIC64GX_PINCTRL_GROUP(can0, BIT(6) | BIT(24) | BIT(28)),
166 "can0"
204 PIC64GX_PINCTRL_FUNCTION(can0),
/linux/Documentation/networking/device_drivers/can/
H A Dcan327.rst84 sudo ip link set can0 down
85 sudo ip link set can0 type can bitrate 500000
86 sudo ip link set can0 up

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