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/linux/arch/arm/boot/dts/renesas/
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
16 compatible = "renesas,r8a7791";
17 #address-cells = <2>;
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H A Dr8a7791-koelsch.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
11 * SSI-AK4643
23 * You can use Mute
28 * You can use Volume Ramp
38 /dts-v1/;
39 #include "r8a7791.dtsi"
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
45 compatible = "renesas,koelsch", "renesas,r8a7791";
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/linux/Documentation/devicetree/bindings/net/can/
H A Drenesas,rcar-can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car CAN Controller
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,can-r8a7778 # R-Car M1-A
18 - renesas,can-r8a7779 # R-Car H1
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Drenesas,rcar-gyroadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
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/linux/Documentation/devicetree/bindings/media/
H A Drenesas,jpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
15 JPU can encode image data and decode JPEG data quickly.
20 - enum:
21 - renesas,jpu-r8a7790 # R-Car H2
22 - renesas,jpu-r8a7791 # R-Car M2-W
23 - renesas,jpu-r8a7792 # R-Car V2H
24 - renesas,jpu-r8a7793 # R-Car M2-N
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
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/linux/drivers/watchdog/
H A Drenesas_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
37 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
39 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
40 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
64 writel_relaxed(val, priv->base + reg); in rwdt_write()
71 rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT); in rwdt_init_timeout()
80 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
90 pm_runtime_get_sync(wdev->parent); in rwdt_start()
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/linux/drivers/phy/renesas/
H A Dphy-rcar-gen2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car Gen2 PHY driver
79 struct rcar_gen2_channel *channel = phy->channel; in rcar_gen2_phy_init()
80 struct rcar_gen2_phy_driver *drv = channel->drv; in rcar_gen2_phy_init()
88 * driver. Achieving this with cmpxcgh() should be SMP-safe. in rcar_gen2_phy_init()
90 if (cmpxchg(&channel->selected_phy, -1, phy->number) != -1) in rcar_gen2_phy_init()
91 return -EBUSY; in rcar_gen2_phy_init()
93 clk_prepare_enable(drv->clk); in rcar_gen2_phy_init()
95 spin_lock_irqsave(&drv->lock, flags); in rcar_gen2_phy_init()
96 ugctrl2 = readl(drv->base + USBHS_UGCTRL2); in rcar_gen2_phy_init()
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/linux/drivers/pci/controller/
H A Dpcie-rcar-host.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
17 #include <linux/clk-provider.h>
21 #include <linux/irqchip/irq-msi-lib.h>
36 #include "pcie-rcar.h"
62 return -EINVAL; in rcar_pcie_wakeup()
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/linux/drivers/net/can/rcar/
H A Drcar_can.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN device driver
18 #include <linux/can/dev.h>
36 * mailbox 60 - 63 - Rx FIFO mailboxes
37 * mailbox 56 - 59 - T
94 struct can_priv can; /* Must be the first member! */ global() member
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/linux/drivers/i2c/busses/
H A Di2c-sh_mobile.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
8 * Portions of the code based on out-of-tree driver i2c-sh7343.c
15 #include <linux/dma-mapping.h>
41 /* ICIC: -DTE */
48 /* ICIC: -DTE */
52 /* 3 bytes or more, +---------+ gets repeated */
57 /* 0 byte receive - not supported since slave may hold SDA low */
62 /* ICIC: -DTE | +DTE */
69 /* ICIC: -DTE | +DTE */
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H A Di2c-rcar.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Renesas R-Car I2C unit
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
6 * Copyright (C) 2011-2019 Renesas Electronics Corporation
8 * Copyright (C) 2012-14 Renesas Solutions Corp.
11 * This file is based on the drivers/i2c/busses/i2c-sh7760.c
12 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
18 #include <linux/dma-mapping.h>
24 #include <linux/i2c-smbus.h>
58 #define MDBS BIT(7) /* non-fifo mode switch */
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/linux/drivers/pinctrl/renesas/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
8 * Copyright (C) 2009 - 2012 Paul Mundt
11 #define DRV_NAME "sh-pfc"
47 return -EINVAL; in sh_pfc_map_resources()
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
57 return -ENOMEM; in sh_pfc_map_resources()
59 pfc->num_windows = num_windows; in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
63 irqs = devm_kcalloc(pfc->dev, num_irqs, sizeof(*irqs), in sh_pfc_map_resources()
66 return -ENOMEM; in sh_pfc_map_resources()
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H A Dpfc-r8a7791.c1 // SPDX-License-Identifier: GPL-2.0
3 * r8a7791/r8a7743 processor support - PFC hardware block.
6 * Copyright (C) 2014-2017 Cogent Embedded, Inc.
15 * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in
1736 /* - ADI -------------------------------------------------------------------- */
1803 /* - Audio Clock ------------------------------------------------------------ */
1849 /* - AVB -------------------------------------------------------------------- */
1925 /* - CAN -------------------------------------------------------------------- */
2053 /* - DU --------------------------------------------------------------------- */
2161 /* - ETH -------------------------------------------------------------------- */
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/linux/drivers/clk/renesas/
H A Drenesas-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-mstp.c, clk-rcar-gen2.c, and clk-rcar-gen3.c
14 #include <linux/clk-provider.h>
28 #include <linux/reset-controller.h>
32 #include <dt-bindings/clock/renesas-cpg-mssr.h>
34 #include "renesas-cpg-mssr.h"
35 #include "clk-div6.h"
48 * If the registers exist, these are valid for SH-Mobile, R-Mobile,
49 * R-Car Gen2, R-Car Gen3, and RZ/G1.
50 * These are NOT valid for R-Car Gen1 and RZ/A1!
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