| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
14 regulator-name:
18 regulator-min-microvolt:
21 regulator-max-microvolt:
24 regulator-microvolt-offset:
28 regulator-min-microamp:
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| /linux/Documentation/hwmon/ |
| H A D | ibmpowernv.rst | 11 -----------
22 the DT maps to an attribute file in 'sysfs'. The node exports unique 'sensor-id'
26 -----------
28 CONFIG_SENSORS_IBMPOWERNV. It can also be built as module 'ibmpowernv'.
31 ----------------
36 fanX_fault - 0: No fail condition
37 - 1: Failing fan
43 tempX_enable Enable/disable all temperature sensors belonging to the
44 sub-group. In POWER9, this attribute corresponds to
45 each OCC. Using this attribute each OCC can be asked to
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 9 accept_memory=eager can be used to accept all memory
16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
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| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-driver-firmware-zynqmp | 1 What: /sys/devices/platform/firmware\:zynqmp-firmware/ggs*
8 Global general storage register that can be used
11 The register is reset during system or power-on
17 # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
18 # echo <value> > /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
22 # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
23 # echo 0x1234ABCD > /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
27 What: /sys/devices/platform/firmware\:zynqmp-firmware/pggs*
35 can be used by system to pass information between
38 This register is only reset by the power-on reset
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| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | gcw0.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/adc/ingenic,adc.h>
9 #include <dt-bindings/input/input.h>
29 stdout-path = "serial2:57600n8";
33 compatible = "regulator-fixed";
34 regulator-name = "vcc";
36 regulator-min-microvolt = <3300000>;
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| /linux/include/drm/ |
| H A D | drm_modeset_helper_vtables.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
61 * struct drm_crtc_helper_funcs - helper operations for CRTCs
75 * This callback is also used to disable a CRTC by calling it with
76 * DRM_MODE_DPMS_OFF if the @disable hook isn't used.
89 * in practice means the driver should disable the CRTC if it is
120 * restriction in the modes it can display. For example, a given crtc
121 * may be responsible to set a clock value. If the clock can not
123 * can be used to restrict the number of modes to only the ones that
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 select 3.0v, then the pin can output 3.0v. "system control" is used
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
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| H A D | mediatek,mt8195-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8195-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
32 gpio-line-names: true
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| H A D | thead,th1520-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-Head TH1520 SoC pin controller
10 - Emil Renner Berthing <emil.renner.berthing@canonical.com>
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
17 PADCTRL_AOSYS -> PAD Group 1
18 PADCTRL1_APSYS -> PAD Group 2
19 PADCTRL0_APSYS -> PAD Group 3
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| H A D | mediatek,mt8188-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <hui.liu@mediatek.com>
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
28 gpio-ranges:
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| H A D | mediatek,mt8186-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8186-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
31 gpio-line-names: true
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| H A D | starfive,jh7110-sys-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
13 can be multiplexed and have configurable bias, drive strength,
18 any GPIO can be set up to be controlled by any of the peripherals.
21 - Jianlong Huang <jianlong.huang@starfivetech.com>
25 const: starfive,jh7110-sys-pinctrl
39 interrupt-controller: true
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| /linux/Documentation/trace/coresight/ |
| H A D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
13 debug module and it is mainly used for two modes: self-hosted debug and
15 debugger connects with SoC from JTAG port; on the other hand the program can
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
22 debug mechanism, Linux kernel can access these related registers from mmio
29 --------------
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| /linux/Documentation/driver-api/nvdimm/ |
| H A D | security.rst | 6 ---------------
10 security DSMs: "get security state", "set passphrase", "disable passphrase",
16 ------------------
28 update <old_keyid> <new_keyid> - enable or update passphrase.
29 disable <keyid> - disable enabled security and remove key.
30 freeze - freeze changing of security states.
31 erase <keyid> - delete existing user encryption key.
32 overwrite <keyid> - wipe the entire nvdimm.
33 master_update <keyid> <new_keyid> - enable or update master passphrase.
34 master_erase <keyid> - delete existing user encryption key.
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| /linux/Documentation/fb/ |
| H A D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | gather_data_sampling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 GDS - Gather Data Sampling
10 -------
17 attacks. GDS is a purely sampling-based attack.
24 Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
28 ----------------
29 Without mitigation, GDS can infer stale data across virtually all
32 Non-enclaves can infer SGX enclave data
33 Userspace can infer kernel data
34 Guests can infer data from hosts
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| /linux/Documentation/networking/ |
| H A D | ip-sysctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 ip_forward - BOOLEAN
11 - 0 - disabled (default)
12 - not 0 - enabled
20 ip_default_ttl - INTEGER
25 ip_no_pmtu_disc - INTEGER
26 Disable Path MTU Discovery. If enabled in mode 1 and a
27 fragmentation-required ICMP is received, the PMTU to this
38 accept fragmentation-needed errors if the underlying protocol
39 can verify them besides a plain socket lookup. Current
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| /linux/Documentation/sound/ |
| H A D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide
10 primary sound card support (``CONFIG_SOUND``). Since ALSA can emulate
32 The user can load modules with options. If the module supports more than
33 one card and you have more than one card of the same type then you can
38 ----------
47 limiting card index for auto-loading (1-8);
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
57 (0 = disable debug prints, 1 = normal debug messages,
60 This option can be dynamically changed via sysfs
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| /linux/Documentation/PCI/ |
| H A D | pci-iov-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Yu Zhao <yu.zhao@intel.com>
10 - Donald Dutile <ddutile@redhat.com>
15 What is SR-IOV
16 --------------
18 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
22 Allocation of the VF can be dynamically controlled by the PF via
25 turned on, each VF's PCI configuration space can be accessed by its own
28 operates on the register set so it can be functional and appear as a
34 How can I enable SR-IOV capability
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| /linux/drivers/irqchip/ |
| H A D | irq-bcm2835.c | 1 // SPDX-License-Identifier: GPL-2.0+
16 * Quirk 2: You can't mask the register 1/2 pending interrupts
20 * You can mask the interrupts and get on with things. With this controller
21 * you can't do that.
23 * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
25 * Those interrupts that have shortcuts can only be masked/unmasked in
26 * their respective banks' enable/disable registers. Doing so in the bank 0
27 * enable/disable registers has no effect.
30 * Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
54 /* Shortcuts can't be disabled so any unknown new ones need to be masked */
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-firmware-acpi | 55 image: The image bitmap. Currently a 32-bit BMP.
93 cause -EINVAL to be returned.
107 as the power button, it can also handle a variable
111 can do a anything the BIOS writer wants from
130 ff_rt_clk: 2 disable
189 error an interrupt that can't be accounted for above.
194 disable the GPE/Fixed Event is valid but disabled.
203 All counters can be cleared by clearing the total "sci"::
210 Besides this, user can also write specific strings to these files
211 to enable/disable/clear ACPI interrupts in user space, which can be
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| H A D | rtc-cdev | 4 Contact: linux-rtc@vger.kernel.org
6 The ioctl interface to drivers for real-time clocks (RTCs).
13 * RTC_AIE_ON, RTC_AIE_OFF: Enable or disable the alarm interrupt
17 RTCs that support alarms. Can be set upto 24 hours in the
22 powerful interface, which can issue alarms beyond 24 hours and
25 * RTC_PIE_ON, RTC_PIE_OFF: Enable or disable the periodic
28 * RTC_UIE_ON, RTC_UIE_OFF: Enable or disable the update
48 newer features -- including those enabled by ACPI -- are exposed
49 by the RTC class framework, but can't be supported by the older
|
| H A D | sysfs-driver-xdata | 1 What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write
6 will create write TLPs frames - from the Root Complex to the
7 Endpoint direction or to disable the PCIe traffic generator
10 Write y/1/on to enable, n/0/off to disable
13 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write
15 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write
17 The user can read the current PCIe link throughput generated
21 cat /sys/class/misc/dw-xdata-pcie.<device>/write
26 What: /sys/class/misc/dw-xdata-pcie.<device>/read
31 will create read TLPs frames - from the Endpoint to the Root
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| /linux/Documentation/power/regulator/ |
| H A D | consumer.rst | 12 A consumer driver can get access to its supply regulator by calling ::
25 Consumers can be supplied by more than one regulator e.g. codec consumer with
35 2. Regulator Output Enable & Disable (static & dynamic drivers)
39 A consumer can enable its power supply by calling::
48 A consumer can determine if a regulator is enabled by calling::
55 A consumer can disable its supply when no longer needed by calling::
60 This may not disable the supply if it's shared with other consumers. The
63 Finally, a regulator can be forcefully disabled in the case of an emergency::
76 voltage to match system operating points. e.g. CPUfreq drivers can scale
80 Consumers can control their supply voltage by calling::
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| /linux/Documentation/power/ |
| H A D | opp.rst | 5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
39 We can represent these as three OPPs as the following {Hz, uV} tuples:
41 - {300000000, 1000000}
42 - {800000000, 1200000}
43 - {1000000000, 1300000}
46 ----------------------------------------
50 is located in include/linux/pm_opp.h. OPP library can be enabled by enabling
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