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/linux/Documentation/hwmon/
H A Dda9052.rst48 The battery voltage is calculated as:
52 The backup battery voltage is calculated as:
56 The voltages on ADC channels 4, 5 and 6 are calculated as:
66 The junction temperature is calculated:
72 The battery temperature is calculated:
H A Dda9055.rst39 The system voltage is calculated as:
43 The voltages on ADC channels 1, 2 and 3 are calculated as:
53 The junction temperature is calculated:
/linux/Documentation/driver-api/cxl/linux/
H A Daccess-coordinates.rst54 Latency in this example is calculated as such:
62 Bandwidth in this example is calculated as such:
82 In the end, the access coordinates for a constructed memory region is calculated from one
141 endpoint CDAT and the upstream link bandwidth is calculated. If the endpoint
142 has a CXL switch as a parent, then min() of calculated bandwidth and the
144 with the endpoint is calculated. The final bandwidth is stored in a
175 Once the access coordinates are calculated, an ACPI Device Specific Method can
/linux/drivers/comedi/drivers/
H A Djr3_pci.h91 * calculated. Setting the changeV1 bit or the changeV2 bit will
163 * calculated to zero. CRC is short for cyclic redundancy code. It is
170 * have calculated to zero. The first is that all the calibration data
354 * will not saturate prematurely. These values are calculated
355 * whenever a new coordinate transformation is calculated. It is
468 * Rate_data is the calculated rate data. It is a first derivative
469 * calculation. It is calculated at a frequency specified by the
471 * calculated is specified by the variable rate_address (pg. 12).
516 * Rate_divisor is how often the rate is calculated. If rate_divisor
517 * is 1, the rates are calculated at full sensor bandwidth. If
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c77 pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n"); in amdgpu_afmt_calc_cts()
79 pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n"); in amdgpu_afmt_calc_cts()
84 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", in amdgpu_afmt_calc_cts()
99 /* And odd clocks get manually calculated */ in amdgpu_afmt_acr()
/linux/drivers/net/ethernet/intel/igbvf/
H A Ddefines.h19 #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
20 #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
21 #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
/linux/include/net/
H A Dpie.h20 * @tupdate: interval at which drop probability is calculated
44 * @dq_tstamp: timestamp at which dq rate was last calculated
48 * @avg_dq_rate: calculated average dq rate
/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A Dvirtual-memory.json34 …aversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by t…
70 …aversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by t…
79 …s for Virtual Machine Monitors (VMMs). Average cycles per walk can be calculated by dividing the …
124 …aversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by t…
/linux/drivers/clk/sunxi/
H A Dclk-sun9i-core.c19 * PLL4 rate is calculated as follows
95 * GT rate is calculated as follows
150 * AHB rate is calculated as follows
230 * APB1 rate is calculated as follows
/linux/Documentation/arch/arm/nwfpe/
H A Dnotes.rst14 I was looking at some code, that calculated a double result, stored it in f4
30 The result of log(x) (a double) will be calculated, returned in f0, then
/linux/arch/arm/boot/compressed/
H A Dfdt_check_mem_start.c55 * Hence validate the calculated address against the memory information in the
147 /* Calculated address is valid, use it */ in fdt_check_mem_start()
162 * The calculated address is not usable, or was overridden by the in fdt_check_mem_start()
/linux/drivers/gpu/drm/amd/display/include/
H A Dbios_parser_types.h225 /* Calculated Reference divider of Display PLL */
227 /* Calculated Feedback divider of Display PLL */
229 /* Calculated Fractional Feedback divider of Display PLL */
231 /* Calculated Pixel Clock Post divider of Display PLL */
/linux/Documentation/arch/x86/
H A Dtopology.rst210 The shifts from the APIC ID for the Socket ID is calculated from the
213 If `ApicIdSize` is reported to be zero, the shift is calculated as the
214 order of the `number of threads` calculated from `NC` field in
239 ID is calculated using the order of `number of threads per core`
240 calculated using the `ThreadsPerCore` field in `EBX[15:8]` which
302 0xB, the shifts for the SMT domains is calculated using the number of
/linux/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_hw.c122 * @checksum_val: calculated checksum
154 * calculated checksum in txgbe_validate_eeprom_checksum()
161 /* If the user cares, return the calculated checksum */ in txgbe_validate_eeprom_checksum()
/linux/fs/jffs2/
H A Dread.c53 …jffs2_dbg(1, "Node read from %08x: node_crc %08x, calculated CRC %08x. dsize %x, csize %x, offset … in jffs2_read_dnode()
58 pr_warn("Node CRC %08x != calculated CRC %08x for node at %08x\n", in jffs2_read_dnode()
125 pr_warn("Data CRC %08x != calculated CRC %08x for node at %08x\n", in jffs2_read_dnode()
130 jffs2_dbg(2, "Data CRC matches calculated CRC %08x\n", crc); in jffs2_read_dnode()
/linux/Documentation/devicetree/bindings/leds/
H A Dskyworks,aat1290.yaml41 Maximum flash LED supply current can be calculated using following
46 Maximum flash timeout can be calculated using following formula::
/linux/sound/soc/renesas/rcar/
H A Dctu.c32 * 1001: Connect calculated data by scale values of matrix row 0
33 * 1010: Connect calculated data by scale values of matrix row 1
34 * 1011: Connect calculated data by scale values of matrix row 2
35 * 1100: Connect calculated data by scale values of matrix row 3
/linux/scripts/kconfig/
H A Dexpr.h42 * @val: calculated tristate value
100 * The calculated value of the symbol. The SYMBOL_VALID bit is set in
114 * if it is a boolean or tristate. Calculated from prompt dependencies,
147 #define SYMBOL_VALID 0x0080 /* set when symbol.curr is calculated */
/linux/Documentation/networking/device_drivers/cellular/qualcomm/
H A Drmnet.rst95 Valid bit indicates whether the partial checksum is calculated and is valid.
152 implies that checksum is calculated on this packet and is valid, value of 0
153 indicates that the calculated packet checksum is invalid.
/linux/Documentation/sound/designs/
H A Dtracepoints.rst92 decided as a fixed number, this value is also calculated according to
98 decided as a single value, this value is also calculated according to
105 also calculated according to it. Else, zero. But this behaviour depends
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,rzv2h-cpg.yaml46 a module number. The module number is calculated as the CLKON register
58 is calculated as the reset register offset index multiplied by 16, plus the
/linux/Documentation/ABI/testing/
H A Dsysfs-class-led14 LEDs within the group to a calculated percentage of what
17 The percentage is calculated for each grouped LED via
/linux/Documentation/misc-devices/
H A Dapds990x.rst29 only lux values. Lux value is calculated using information from the both
30 channels. HW threshold level is calculated from the given lux value to match
/linux/drivers/watchdog/
H A Dcadence_wdt.c162 * The counter value is calculated according to the formula:
163 * calculated count = (timeout * clock) / prescaler + 1.
164 * The calculated count is divided by 0x1000 to obtain the field value
167 * prescaler to 4096 and the calculated count and access key
/linux/drivers/net/phy/aquantia/
H A Daquantia_firmware.c125 /* Word is swapped internally and MAILBOX CRC is calculated in aqr_fw_load_memory()
139 /* ...and make sure it does match our calculated CRC */ in aqr_fw_load_memory()
141 phydev_err(phydev, "CRC mismatch: calculated 0x%04x PHY 0x%04x\n", in aqr_fw_load_memory()
169 phydev_err(phydev, "bad firmware CRC: file 0x%04x calculated 0x%04x\n", in aqr_fw_boot()

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