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/linux/drivers/devfreq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
9 operating frequency based on the device driver's policy.
19 clock frequency of the device, which is also attached
20 to a device by 1-to-1. The device registering devfreq takes the
21 responsibility to "interpret" the representative frequency and
37 Chooses frequency based on the recent load on the device. Works
39 Simple-Ondemand should be able to provide busy/total counter
46 Sets the frequency at the maximum available frequency.
47 This governor always returns UINT_MAX as frequency so that
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/linux/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Korsgaard <peter@korsgaard.com>
11 - Andrew Lunn <andrew@lunn.ch>
14 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - items:
20 - enum:
21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
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H A Daspeed,i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rayn Chen <rayn_chen@aspeedtech.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - aspeed,ast2400-i2c-bus
19 - aspeed,ast2500-i2c-bus
20 - aspeed,ast2600-i2c-bus
25 - description: address offset and range of bus
26 - description: address offset and range of bus buffer
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H A Di2c-pca-platform.txt4 parallel-bus microcontrollers/microprocessors and the serial I2C-bus
5 and allows the parallel bus system to communicate bi-directionally
6 with the I2C-bus.
10 - reg : Offset and length of the register set for the device
11 - compatible : one of "nxp,pca9564" or "nxp,pca9665"
14 - interrupts : the interrupt number
15 - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line
17 - clock-frequency : I2C bus frequency.
22 #address-cells = <1>;
23 #size-cells = <0>;
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H A Di2c-opal.txt1 Device-tree bindings for I2C OPAL driver
2 ----------------------------------------
6 perspective, the properties of use are "ibm,port-name" and "ibm,opal-id".
10 - reg: Port-id within a given master
11 - compatible: must be "ibm,opal-i2c"
12 - ibm,opal-id: Refers to a specific bus and used to identify it when calling
14 - bus-frequency: Operating frequency of the i2c bus (in HZ). Informational for
18 - ibm,port-name: Firmware provides this name that uniquely identifies the i2c
23 a P8 on-chip bus.
27 i2c-bus@0 {
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H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
29 const: snps,designware-i2c
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 /dts-v1/;
10 chassis-type = "embedded";
11 compatible = "mediatek,mt8186-evb", "mediatek,mt8186";
18 stdout-path = "serial0:921600n8";
30 clock-frequency = <400000>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c0_pins>;
38 clock-frequency = <400000>;
39 i2c-scl-internal-delay-ns = <8000>;
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H A Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
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/linux/drivers/staging/iio/Documentation/
H A Dsysfs-bus-iio-dds2 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY
4 Contact: linux-iio@vger.kernel.org
6 Stores frequency into tuning word Y.
8 which allows for pin controlled FSK Frequency Shift Keying
13 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY_scale
15 Contact: linux-iio@vger.kernel.org
18 obtain the desired value in Hz. If shared across all frequency
22 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencysymbol
24 Contact: linux-iio@vger.kernel.org
26 Specifies the active output frequency tuning word. The value
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-impedance-analyzer-ad59331 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_start
4 Contact: linux-iio@vger.kernel.org
6 Frequency sweep start frequency in Hz.
8 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_increment
11 Contact: linux-iio@vger.kernel.org
13 Frequency increment in Hz (step size) between consecutive
14 frequency points along the sweep.
16 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_points
19 Contact: linux-iio@vger.kernel.org
21 Number of frequency points (steps) in the frequency sweep.
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H A Dsysfs-platform-dptf1 What: /sys/bus/platform/devices/INT3407:00/dptf_power/charger_type
4 Contact: linux-acpi@vger.kernel.org
6 (RO) The charger type - Traditional, Hybrid or NVDC.
8 What: /sys/bus/platform/devices/INT3407:00/dptf_power/adapter_rating_mw
11 Contact: linux-acpi@vger.kernel.org
16 What: /sys/bus/platform/devices/INT3407:00/dptf_power/max_platform_power_mw
19 Contact: linux-acpi@vger.kernel.org
24 What: /sys/bus/platform/devices/INT3407:00/dptf_power/platform_power_source
27 Contact: linux-acpi@vger.kernel.org
33 - 0x00 = DC
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H A Dsysfs-driver-intel-xe-hwmon1 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
4 Contact: intel-xe@lists.freedesktop.org
7 The power controller will throttle the operating frequency
15 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
18 Contact: intel-xe@lists.freedesktop.org
24 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
27 Contact: intel-xe@lists.freedesktop.org
32 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
35 Contact: intel-xe@lists.freedesktop.org
41 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_max
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H A Dsysfs-bus-iio-dac-ltc26881 What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_dither_en
3 Contact: linux-iio@vger.kernel.org
8 - disable dither operation;
9 - change dither parameters (eg: frequency, phase...);
10 - enabled dither operation
12 What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_dither_raw
14 Contact: linux-iio@vger.kernel.org
20 What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_dither_raw_available
22 Contact: linux-iio@vger.kernel.org
26 What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_dither_offset
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/linux/arch/powerpc/sysdev/
H A Dmpc5xxx_clocks.c1 // SPDX-License-Identifier: GPL-2.0
10 * mpc5xxx_fwnode_get_bus_frequency - Find the bus frequency for a firmware node
13 * Returns bus frequency (IPS on MPC512x, IPB on MPC52xx),
14 * or 0 if the bus frequency cannot be found.
22 ret = fwnode_property_read_u32(fwnode, "bus-frequency", &bus_freq); in mpc5xxx_fwnode_get_bus_frequency()
27 ret = fwnode_property_read_u32(parent, "bus-frequency", &bus_freq); in mpc5xxx_fwnode_get_bus_frequency()
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2166x-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
11 #include <dt-bindings/clock/bcm21664.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 /* Hub bus */
20 hub: hub-bus@34000000 {
21 compatible = "simple-bus";
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet_mdio.c1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
24 * axienet_mdio_wait_until_ready - MDIO wait function
41 * axienet_mdio_mdc_enable - MDIO MDC enable function
49 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
53 * axienet_mdio_mdc_disable - MDIO MDC disable function
68 * axienet_mdio_read - MDIO interface read function
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 Basically, it is a bus of devices, that could act more or less
27 - const: fsl,qe
28 - const: simple-bus
40 bus-frequency:
42 description: the clock frequency for QUICC Engine.
44 fsl,qe-num-riscs:
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "regulator-output"; \
10 vout-supply = <&efuse##n>; \
19 shunt-resistor-micro-ohms = <675>; \
22 regulator-name = __stringify(efuse##num##-reg); \
28 model = "Delta Power AHE-50DC";
29 compatible = "delta,ahe50dc-bmc", "aspeed,ast2400";
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/linux/Documentation/devicetree/bindings/mmc/
H A Dcavium-mmc.txt10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
17 - clocks : phandle
20 - for cd, bus-width and additional generic mmc parameters
22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dsamsung,exynos-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Bus and Interconnect
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.
16 Generally, each bus of Exynos SoC includes a source clock and a power line,
17 which are able to change the clock frequency of the bus in runtime. To
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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H A Dfsl-ls1028a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
H A Di2c.txt3 The I2C controller is expressed as a bus under the CPM node.
6 - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
7 - reg : On CPM2 devices, the second resource doesn't specify the I2C
10 - #address-cells : Should be one. The cell is the i2c device address with
12 - #size-cells : Should be zero.
13 - clock-frequency : Can be used to set the i2c clock frequency. If
14 unspecified, a default frequency of 60kHz is being used.
16 i2c drivers to find the bus to probe:
17 - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
18 the bus number is dynamically assigned by the i2c core.
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/linux/arch/arm/boot/dts/renesas/
H A Dr8a7742-iwg21d-q7-dbcm-ca.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board development
9 /dts-v1/;
11 #include <dt-bindings/media/video-interfaces.h>
13 #include "r8a7742-iwg21d-q7.dts"
16 model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
27 mclk_cam1: mclk-cam1 {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <26000000>;
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