1 // SPDX-License-Identifier: GPL-2.0
3  * MDIO bus driver for the Xilinx Axi Ethernet device
6  * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7  * Copyright (c) 2010 - 2011 PetaLogix
9  * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
24  * axienet_mdio_wait_until_ready - MDIO wait function
41  * axienet_mdio_mdc_enable - MDIO MDC enable function
49 		    ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK));  in axienet_mdio_mdc_enable()
53  * axienet_mdio_mdc_disable - MDIO MDC disable function
68  * axienet_mdio_read - MDIO interface read function
69  * @bus:	Pointer to mii bus structure
73  * Return:	The register contents on success, -ETIMEDOUT on a timeout
79 static int axienet_mdio_read(struct mii_bus *bus, int phy_id, int reg)  in axienet_mdio_read()  argument
83 	struct axienet_local *lp = bus->priv;  in axienet_mdio_read()
109 	dev_dbg(lp->dev, "axienet_mdio_read(phy_id=%i, reg=%x) == %x\n",  in axienet_mdio_read()
117  * axienet_mdio_write - MDIO interface write function
118  * @bus:	Pointer to mii bus structure
123  * Return:	0 on success, -ETIMEDOUT on a timeout
129 static int axienet_mdio_write(struct mii_bus *bus, int phy_id, int reg,  in axienet_mdio_write()  argument
133 	struct axienet_local *lp = bus->priv;  in axienet_mdio_write()
135 	dev_dbg(lp->dev, "axienet_mdio_write(phy_id=%i, reg=%x, val=%x)\n",  in axienet_mdio_write()
165  * axienet_mdio_enable - MDIO hardware setup function
169  * Return:	0 on success, -ETIMEDOUT on a timeout, -EOVERFLOW on a clock
182 	lp->mii_clk_div = 0;  in axienet_mdio_enable()
184 	if (lp->axi_clk) {  in axienet_mdio_enable()
185 		host_clock = clk_get_rate(lp->axi_clk);  in axienet_mdio_enable()
189 		/* Legacy fallback: detect CPU clock frequency and use as AXI  in axienet_mdio_enable()
190 		 * bus clock frequency. This only works on certain platforms.  in axienet_mdio_enable()
194 			netdev_warn(lp->ndev, "Could not find CPU device node.\n");  in axienet_mdio_enable()
197 			int ret = of_property_read_u32(np1, "clock-frequency",  in axienet_mdio_enable()
200 				netdev_warn(lp->ndev, "CPU clock-frequency property not found.\n");  in axienet_mdio_enable()
205 		netdev_info(lp->ndev, "Setting assumed host clock to %u\n",  in axienet_mdio_enable()
210 		of_property_read_u32(np, "clock-frequency", &mdio_freq);  in axienet_mdio_enable()
212 		netdev_info(lp->ndev, "Setting non-standard mdio bus frequency to %u Hz\n",  in axienet_mdio_enable()
234 	 * clk_div >= (fHOST / 5000000) - 1  in axienet_mdio_enable()
237 	 * "clock-frequency" from the CPU  in axienet_mdio_enable()
240 	clk_div = (host_clock / (mdio_freq * 2)) - 1;  in axienet_mdio_enable()
244 	 * above the requested frequency  in axienet_mdio_enable()
251 		netdev_warn(lp->ndev, "MDIO clock divisor overflow\n");  in axienet_mdio_enable()
252 		return -EOVERFLOW;  in axienet_mdio_enable()
254 	lp->mii_clk_div = (u8)clk_div;  in axienet_mdio_enable()
256 	netdev_dbg(lp->ndev,  in axienet_mdio_enable()
258 		   lp->mii_clk_div, host_clock);  in axienet_mdio_enable()
270  * axienet_mdio_setup - MDIO setup function
273  * Return:	0 on success, -ETIMEDOUT on a timeout, -EOVERFLOW on a clock
274  *		divisor overflow, -ENOMEM when mdiobus_alloc (to allocate
275  *		memory for mii bus structure) fails.
283 	struct mii_bus *bus;  in axienet_mdio_setup()  local
286 	bus = mdiobus_alloc();  in axienet_mdio_setup()
287 	if (!bus)  in axienet_mdio_setup()
288 		return -ENOMEM;  in axienet_mdio_setup()
290 	snprintf(bus->id, MII_BUS_ID_SIZE, "axienet-%.8llx",  in axienet_mdio_setup()
291 		 (unsigned long long)lp->regs_start);  in axienet_mdio_setup()
293 	bus->priv = lp;  in axienet_mdio_setup()
294 	bus->name = "Xilinx Axi Ethernet MDIO";  in axienet_mdio_setup()
295 	bus->read = axienet_mdio_read;  in axienet_mdio_setup()
296 	bus->write = axienet_mdio_write;  in axienet_mdio_setup()
297 	bus->parent = lp->dev;  in axienet_mdio_setup()
298 	lp->mii_bus = bus;  in axienet_mdio_setup()
300 	mdio_node = of_get_child_by_name(lp->dev->of_node, "mdio");  in axienet_mdio_setup()
304 	ret = of_mdiobus_register(bus, mdio_node);  in axienet_mdio_setup()
315 	mdiobus_free(bus);  in axienet_mdio_setup()
316 	lp->mii_bus = NULL;  in axienet_mdio_setup()
321  * axienet_mdio_teardown - MDIO remove function
324  * Unregisters the MDIO and frees any associate memory for mii bus.
328 	mdiobus_unregister(lp->mii_bus);  in axienet_mdio_teardown()
329 	mdiobus_free(lp->mii_bus);  in axienet_mdio_teardown()
330 	lp->mii_bus = NULL;  in axienet_mdio_teardown()