| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | lantiq,etop-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - John Crispin <john@phrozen.org> 14 pattern: "^ethernet@[0-9a-f]+$" 17 const: lantiq,etop-xway 24 - description: TX interrupt 25 - description: RX interrupt 27 interrupt-names: [all …]
|
| H A D | samsung-sxgbe.txt | 4 - compatible: Should be "samsung,sxgbe-v2.0a" 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain the SXGBE interrupts 9 index 0 - this is fixed common interrupt of SXGBE and it is always 11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts 13 - phy-mode: String, operation mode of the PHY interface. 15 - samsun [all...] |
| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
|
| H A D | snps,dwc-qos-ethernet.txt | 13 - compatible: One of: 14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10" 15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC. 16 - "nvidia,tegra186-eqos", "snps,dwc-qo [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | dwc3.txt | 3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties 7 - compatible: must be "snps,dwc3" 8 - reg : Address and length of the register set for the device 9 - interrupts: Interrupts used by the dwc3 controller. 10 - clock-names: list of clock names. Ideally should be "ref", 12 - clocks: list of phandle and clock specifier pairs corresponding to 13 entries in the clock-names property. 16 clocks are optional if the parent node (i.e. glue-layer) is compatible to 18 "cavium,octeon-7130-usb-uctl" 20 "samsung,exynos5250-dwusb3" [all …]
|
| H A D | ci-hdrc-usb2.txt | 4 - compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" 13 "fsl,imx7ulp-usb" [all …]
|
| H A D | snps,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 be presented as a standalone DT node with an optional vendor-specific 18 - $ref: usb-drd.yaml# 19 - if: 25 - dr_mode 29 $ref: usb-xhci.yaml# 35 - const: snps,dwc3 [all …]
|
| H A D | chipidea,usb2-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 25 clock-names: 31 power-domains: 37 reset-names: 40 "#reset-cells": 45 itc-setting: [all …]
|
| H A D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 11 - Peng Fan <peng.fan@nxp.com> 16 - enum: 17 - chipidea,usb2 18 - lsi,zevio-usb 19 - nuvoton,npcm750-udc [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | snps,dw-axi-dmac.txt | 4 - compatible: "snps,axi-dma-1.01a" 5 - reg: Address range of the DMAC registers. This should include 6 all of the per-channel registers. 7 - interrupt: Should contain the DMAC interrupt number. 8 - dma-channels: Number of channels supported by hardware. 9 - snps,dma-masters: Number of AXI masters supported by the hardware. 10 - snps,data-width: Maximum AXI data width supported by hardware. 11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits) 12 - snps,priority: Priority of channel. Array size is equal to the number of 13 dma-channels. Priority value must be programmed within [0:dma-channels-1] [all …]
|
| H A D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Viresh Kumar <vireshk@kernel.org> 11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com> 14 - $ref: dma-controller.yaml# 19 - const: snps,dma-spear1340 20 - items: 21 - enum: [all …]
|
| H A D | snps,dw-axi-dmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> 16 - $ref: dma-controller.yaml# 21 - snps,axi-dma-1.01a 22 - intel,kmb-axi-dma 23 - starfive,jh7110-axi-dma 24 - starfive,jh8100-axi-dma [all …]
|
| H A D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - chuanhua.lei@intel.com 11 - mallikarjunax.reddy@intel.com 14 - $ref: dma-controller.yaml# 19 - intel,lgm-cdma 20 - intel,lgm-dma2tx 21 - intel,lgm-dma1rx 22 - intel,lgm-dma1tx [all …]
|
| H A D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC) 4 - compatible: Must be "img,pistachio-mdc-dma". 5 - reg: Must contain the base address and length of the MDC registers. 6 - interrupts: Must contain all the per-channel DMA interrupts. 7 - clocks: Must contain an entry for each entry in clock-names. 8 See ../clock/clock-bindings.txt for details. 9 - clock-names: Must include the following entries: 10 - sys: MDC system interface clock. 11 - img,cr-periph: Must contain a phandle to the peripheral control syscon 13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier. [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 24 gpmc,sync-clk-ps: 28 # Chip-select signal timings corresponding to GPMC_CONFIG2: 29 gpmc,cs-on-ns: 33 gpmc,cs-rd-off-ns: [all …]
|
| H A D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following: 9 ti,omap2420-gpmc (omap2420) 10 ti,omap2430-gpmc (omap2430) 11 ti,omap3430-gpmc (omap3430 & omap3630) 12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x) 13 ti,am3352-gpmc (am335x devices) 15 - reg: A resource specifier for the register space 17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is 19 - #address-cells: Must be set to 2 to allow memory address translation 20 - #size-cells: Must be set to 1 to allow CS address passing [all …]
|
| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_udma_regs_m2s.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 84 * 00 - No pending tasks 98 * 0 - Log is enabled. 99 * 1 - Log is masked. 159 /* [0x54] M2S packet length configuration */ 173 /* [0x10] Data burst read configuration */ 213 * 0 - Rate limit is active. 214 * 1 - Rate limit is masked. 235 /* [0x4] Counting number of descriptors with First-bit set. */ [all …]
|
| H A D | al_hal_udma_regs_s2m.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 86 * 00 - No pending tasks 100 * 0 - Log is enable 101 * 1 - Log is masked. 190 * [0x8] Counting the net length of the data buffers [64-bit] 195 * [0xc] Counting the net length of the data buffers [64-bit] 251 * [0x30] Rx Descriptor Ring Length[23:2] 315 /* Burst type */ 323 /* Bus size, 128-bit */ [all …]
|
| H A D | al_hal_udma_config.h | 9 found at http://www.gnu.org/licenses/gpl-2.0.html 53 /* *INDENT-OFF* */ 57 /* *INDENT-ON* */ 81 uint8_t burst; member 95 uint8_t min_axi_beats; /* Minimum burst for writing completion desc. */ 108 uint8_t min_axi_beats; /* Minimum burst for writing completion desc. */ 137 /* in one burst (5b) */ 139 uint8_t min_burst_above_thr; /* min burst size when fifo above 142 uint8_t min_burst_below_thr; /* min burst size when fifo below 168 uint8_t min_burst_above_thr; /* min burst size when fifo above [all …]
|
| /freebsd/share/man/man4/ |
| H A D | ng_car.4 | 39 .Bl -bullet -compact 45 RED-like rate limit algorithm used by Cisco, 51 .Bl -tag -width ".Va upper" 74 .Bl -tag -width foo 77 Committed burst packets are counted as green, extended burst packets are 79 Committed burst getting refilled with CIR (Committed Information Rate) speed. 80 When it is full, exceeded burst getting refilled. 83 Committed burst packets are counted as green, peak burst packets are counted 85 Committed burst getting refilled with CIR speed. 86 Peak burst getting refilled with PIR (Peak Information Rate) speed at the [all …]
|
| /freebsd/sys/contrib/openzfs/include/sys/ |
| H A D | zfs_ratelimit.h | 1 // SPDX-License-Identifier: CDDL-1.0 32 * allow the burst to be a (changeable) module parameter. 34 unsigned int *burst; member 36 unsigned int interval; /* Interval length in seconds */ 41 void zfs_ratelimit_init(zfs_ratelimit_t *rl, unsigned int *burst,
|
| /freebsd/contrib/ntp/html/drivers/ |
| H A D | driver7.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1"> 13 <!-- #BeginDate format:En2m -->17-Jul-2014 02:17<!-- #EndDate --> 20 Modem Port: <tt>/dev/chu<i>u</i></tt>; 300 baud, 8-bits, no parity<br> 21 Autotune Port: <tt>/dev/icom</tt>; 1200/9600 baud, 8-bits, no parity<br> 25 …from Canadian time/frequency station <a href="http://inms-ienm.nrc-cnrc.gc.ca/time_services/shortw… 31 …-compatible, 300-b/s modem or modem chip, as described on the <a href="../pps.html">Pulse-per-seco… 32 …d ray geometry. In Newark DE, 625 km from the transmitter, the predicted one-hop propagation delay… 33 …r, the mean offset with a 2.4-GHz P4 running FreeBSD 6.1 is generally within 0.2 ms short-term wit… 37 …-kHz μ-law companded codec samples using maximum-likelihood techniques which exploit the consid… [all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 6 #include "omap3-gta04a5.dts" 13 gpmc_pins: gpmc-pins { 14 pinctrl-single,pins = < 45 pinctrl-names = "default"; 46 pinctrl-0 = <&gpmc_pins>; 48 /delete-node/ nand@0,0; 52 #address-cells = <1>; 53 #size-cells = <1>; [all …]
|
| H A D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 stdout-path = &uart3; 16 compatible = "i2c-cbus-gpio"; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 interrupt-parent = <&gpio4>; 34 clock-frequency = <400000>; 44 clock-frequency = <400000>; 50 /* gpio-irq for dma: 26 */ 53 #address-cells = <1>; [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | exynos_dsim.txt | 4 - compatible: value should be one of the following 5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ 6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ 7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ 8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ 9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ 10 - reg: physical base address and length of the registers set for the device 11 - interrupts: should contain DSI interrupt 12 - clocks: list of clock specifiers, must contain an entry for each required 13 entry in clock-names [all …]
|