| /linux/Documentation/arch/riscv/ |
| H A D | boot.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 RISC-V Kernel Boot Requirements and Constraints
10 This document describes what the RISC-V kernel expects from bootloaders and
12 touching the early boot process. For the purposes of this document, the
13 ``early boot process`` refers to any code that runs before the final virtual
16 Pre-kernel Requirements and Constraints
19 The RISC-V kernel expects the following of bootloaders and platform firmware:
22 --------------
24 The RISC-V kernel expects:
30 ---------
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| /linux/Documentation/firmware-guide/acpi/apei/ |
| H A D | einj.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 for early boot messages similar to this one::
15 which shows that the BIOS is exposing an EINJ table - it is the
43 - available_error_type
51 0x00000002 Processor Uncorrectable non-fatal
54 0x00000010 Memory Uncorrectable non-fatal
57 0x00000080 PCI Express Uncorrectable non-fatal
60 0x00000400 Platform Uncorrectable non-fatal
70 - error_type
75 - error_inject
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
12 - William Zhang <william.zhang@broadcom.com>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
27 -- Additional SoC-specific NAND controller properties --
35 interesting ways, sometimes with registers that lump multiple NAND-related
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| /linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
21 * NAND special boot partitions
59 * @boot_partitions: array of boot partitions where offset and size of the
60 * boot partitions are stored
66 * @nr_boot_partitions: count of the boot partitions where spare data is not
70 * @cw_size: the number of bytes in a single step/codeword
71 * of a page, consisting of all data, ecc, spare
82 * ecc/non-ecc mode for the current nand flash
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| H A D | meson_nand.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 #include <linux/dma-mapping.h>
13 #include <linux/clk-provider.h>
84 #define ECC_CHECK_RETURN_FF (-1)
104 #define ROW_ADDER(page, index) (((page) >> (8 * (index))) & 0xff) argument
269 if (chip < 0 || WARN_ON_ONCE(chip >= meson_chip->nsels)) in meson_nfc_select_chip()
272 nfc->param.chip_select = meson_chip->sels[chip] ? NAND_CE1 : NAND_CE0; in meson_nfc_select_chip()
273 nfc->param.rb_select = nfc->param.chip_select; in meson_nfc_select_chip()
274 nfc->timing.twb = meson_chip->twb; in meson_nfc_select_chip()
275 nfc->timing.tadl = meson_chip->tadl; in meson_nfc_select_chip()
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| /linux/Documentation/arch/x86/ |
| H A D | pat.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 PAT (Page Attribute Table)
7 x86 Page Attribute Table (PAT) allows for setting the memory attribute at the
8 page level granularity. PAT is complementary to the MTRR settings which allows
10 more flexible than MTRR due to its capability to set attributes at page level
20 WB Write-back
22 WC Write-combined
23 WT Write-through
24 UC- Uncached Minus
32 attributes at the page level. In order to avoid aliasing, these interfaces
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| H A D | sgx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 * Privileged (ring-0) ENCLS functions orchestrate the construction of the
15 * Unprivileged (ring-3) ENCLU functions allow an application to enter and
34 Enclave Page Cache
37 SGX utilizes an *Enclave Page Cache (EPC)* to store pages that are associated
38 with an enclave. It is contained in a BIOS-reserved region of physical memory.
48 Enclave Page Types
49 ------------------
64 number for a page evicted from the EPC.
66 Enclave Page Cache Map
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| /linux/arch/x86/include/asm/ |
| H A D | x86_init.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct x86_init_mpparse - platform specific mpparse ops
28 * struct x86_init_resources - platform specific resource related ops
43 * struct x86_init_irqs - platform specific interrupt setup
60 * struct x86_init_oem - oem platform specific customizing functions
70 * struct x86_init_paging - platform specific paging functions
81 * struct x86_init_timers - platform specific timer setup
83 * boot cpu
94 * struct x86_init_iommu - platform specific iommu setup
102 * struct x86_init_pci - platform specific pci init functions
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| /linux/arch/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
22 # IOMMUs not handled by dma-iommu. Drivers must never select this symbol.
29 menu "General architecture-dependent options"
34 Select if the architecture can check permissions at sub-page
70 by sharing mid-level caches, last-level cache tags or internal
74 bool "Multi-Core Cache (MC) scheduler support"
78 Multi-core scheduler support improves the CPU scheduler's decision
79 making when dealing with multi-core CPU chips at a cost of slightly
127 for kernel debugging, non-intrusive instrumentation and testing.
136 makes certain almost-always-true or almost-always-false branch
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| /linux/arch/xtensa/kernel/ |
| H A D | head.S | 10 * Copyright (C) 2001 - 2008 Tensilica Inc.
20 #include <asm/page.h>
34 * - The kernel image has been loaded to the actual address where it was
36 * - a2 contains either 0 or a pointer to a list of boot parameters.
44 * The bootloader passes a pointer to a list of boot parameters in a2.
53 .begin no-absolute-literals
57 /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */
67 * xt-gdb to single step via DEBUG exceptions received directly
84 Offset = _SetupMMU - _start
106 .end no-absolute-literals
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| /linux/arch/arm64/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
288 ARM 64-bit (AArch64) Linux support.
296 # required due to use of the -Zfixed-x18 flag.
299 # -Zsanitizer=shadow-call-stack flag.
309 depends on $(cc-option,-fpatchable-function-entry=2)
335 # VA_BITS - PTDESC_TABLE_SHIFT
413 def_bool !$(as-instr,1:\n.inst 0\n.rept . - 1b\n\nnop\n.endr\n)
418 # https://github.com/llvm/llvm-project/commit/2a96f47c5ffca84cd774ad402cacd137f4bf45e2
468 at stage-2.
493 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce…
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| /linux/arch/x86/kernel/ |
| H A D | head_64.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
18 #include <asm/page.h>
21 #include <asm/processor-flags.h>
25 #include <asm/nospec-branch.h>
32 * We are not able to switch in one step to the final KERNEL ADDRESS SPACE
33 * because we need identity-mapped pages.
42 * and someone has loaded an identity mapped page table
43 * for us. These identity mapped page tables map all of the
51 * arch/x86/boot/compressed/head_64.S.
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| H A D | smpboot.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * Pentium Pro and Pentium-II/Xeon MP machines.
19 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
25 * Alan Cox : Dumb bug: 'B' step PPro's are fine
31 * Andi Kleen : Changed for SMP boot into long mode.
32 * Martin J. Bligh : Added support for multi-quad systems
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
86 #include <asm/intel-family.h>
88 #include <asm/spec-ctrl.h>
92 #include <asm/spec-ctrl.h>
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| H A D | alternative.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <asm/text-patching.h>
12 #include <asm/insn-eval.h>
21 #define MAX_PATCH_LEN (255-1)
42 __setup("debug-alternative", debug_alt);
51 __setup("noreplace-smp", setup_noreplace_smp);
68 for (j = 0; j < (len) - 1; j++) \
124 void *page __free(execmem) = execmem_alloc_rw(EXECMEM_MODULE_TEXT, PAGE_SIZE); in __its_alloc()
125 if (!page) in __its_alloc()
128 void *tmp = krealloc(pages->pages, (pages->num+1) * sizeof(void *), in __its_alloc()
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| /linux/Documentation/filesystems/ |
| H A D | ramfs-rootfs-initramfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 --------------
15 mechanisms (the page cache and dentry cache) as a dynamically resizable
16 RAM-based filesystem.
28 dentries and page cache as usual, but there's nowhere to write them to.
39 ------------------
45 fake block device into the page cache (and copying changes back out), as well
51 to avoid this copying by playing with the page tables, but they're unpleasantly
54 since all file access goes through the page and dentry caches. The RAM
57 Another reason ramdisks are semi-obsolete is that the introduction of
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| /linux/arch/powerpc/mm/book3s64/ |
| H A D | hash_utils.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * PowerPC Hashed Page Table functions
20 #define pr_fmt(fmt) "hash-mmu: " fmt
41 #include <linux/elf-randomize.h>
49 #include <asm/page.h>
62 #include <asm/text-patching.h>
68 #include <asm/pte-walk.h>
69 #include <asm/asm-prototypes.h>
95 * Note: pte --> Linux PTE
96 * HPTE --> PowerPC Hashed Page Table Entry
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| /linux/Documentation/admin-guide/ |
| H A D | bug-bisect.rst | 1 .. SPDX-License-Identifier: (GPL-2.0+ OR CC-BY-4.0)
9 change that broke something -- for example when some functionality stopped
13 kernel, better follow Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst
17 care about the result -- for example, because the problem happens after the
28 use as pristine base at each bisection step; ideally, you have also worked out
29 a fully reliable and straight-forward way to reproduce the regression, too.*
38 Instead of Git tags like 'v6.0' and 'v6.1' you can specify commit-ids, too.
46 2. Now build, install, and boot a kernel. This might fail for unrelated reasons,
49 go back to step 1.
68 test after this (roughly 10 steps)'. In that case go back to step 1.
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| H A D | kernel-parameters.txt | 39 Documentation/arch/m68k/kernel-options.rst.
49 PARISC The PA-RISC architecture is enabled.
64 the Documentation/scsi/ sub-directory.
83 X86-32 X86-32, aka i386 architecture is enabled.
84 X86-64 X86-64 architecture is enabled.
85 X86 Either 32-bit or 64-bit x86 (same as X86-32+X86-64)
92 BOOT Is a boot loader parameter.
94 KNL Is a kernel start-up parameter.
103 avoid prolonged boot times. The lazy option will add
108 at once during boot.
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| H A D | spkguide.txt | 16 Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A
25 http://linux-speakup.org/. Speakup is a set of patches to the standard
44 is to boot your system, and Speakup should come up talking. This
60 the default one, then you may issue the following command at the boot
61 prompt of your boot loader.
66 DoubleTalk LT at boot up. You may replace the ltlk synthesizer keyword
72 acntsa -- Accent SA
73 acntpc -- Accent PC
74 apollo -- Apollo
75 audptr -- Audapter
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| /linux/arch/arm64/kernel/ |
| H A D | hibernate.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Ubuntu project, hibernation support for mach-dove
50 /* hyp-stub vectors, used to restore el2 during resume from hibernate. */
54 * The logical cpu number we should resume on, initialised to a non-cpu
57 static int sleep_cpu = -EINVAL;
78 * re-configure el2.
88 memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version)); in arch_hdr_invariants()
94 unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1); in pfn_is_nosave()
113 return -EOVERFLOW; in arch_hibernation_header_save()
115 arch_hdr_invariants(&hdr->invariants); in arch_hibernation_header_save()
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| /linux/Documentation/core-api/ |
| H A D | dma-isa-lpc.rst | 12 ------------------------
16 #include <linux/dma-mapping.h>
20 bus addresses (see Documentation/core-api/dma-api.rst for details).
28 -----------------
37 The DMA-able address space is the lowest 16 MB of _physical_ memory.
38 Also the transfer block may not cross page boundaries (which are 64
45 allocate the memory during boot-up it's a good idea to also pass
52 -------------------
66 --------
69 8-bit transfers and the upper four are for 16-bit transfers.
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| /linux/Documentation/security/ |
| H A D | ipe.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 Integrity Policy Enforcement (IPE) - Kernel Documentation
10 :doc:`IPE admin guide </admin-guide/LSM/ipe>`.
13 ---------------------
16 of a locked-down system. This system would be born-secure, and have
27 2. DM-Verity
29 Both options were carefully considered, however the choice to use DM-Verity
46 modify filesystem offline, the attacker could wipe all the xattrs -
50 With DM-Verity, as the xattrs are saved as part of the Merkel tree, if
51 offline mount occurs against the filesystem protected by dm-verity, the
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| /linux/drivers/input/touchscreen/ |
| H A D | raydium_i2c_ts.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2014, Raydium Semiconductor Corporation.
11 * Contact Raydium Semiconductor Corporation at www.rad-ic.com
34 #define RM_CMD_BOOT_PAGE_WRT 0x0B /* send bl page write */
117 /* struct raydium_data - represents state of Raydium touchscreen device */
158 xfer_count -= xfer_start_idx; in raydium_i2c_xfer()
160 ret = i2c_transfer(client->adapter, &xfer[xfer_start_idx], xfer_count); in raydium_i2c_xfer()
164 return ret < 0 ? ret : -EIO; in raydium_i2c_xfer()
177 return -ENOMEM; in raydium_i2c_send()
194 * for this driver. Regmap handles page(bank) switch and reads in raydium_i2c_send()
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| /linux/arch/x86/mm/ |
| H A D | extable.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <asm/insn-eval.h>
30 return (unsigned long)&x->fixup + x->fixup; in ex_fixup_addr()
36 if (e->data & EX_FLAG_CLEAR_AX) in ex_handler_default()
37 regs->ax = 0; in ex_handler_default()
38 if (e->data & EX_FLAG_CLEAR_DX) in ex_handler_default()
39 regs->dx = 0; in ex_handler_default()
41 regs->ip = ex_fixup_addr(e); in ex_handler_default()
47 * and it's a page crosser into a non-existent page.
49 * This happens when we optimistically load a pathname a word-at-a-time
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| /linux/arch/powerpc/lib/ |
| H A D | code-patching.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <asm/page.h>
20 #include <asm/text-patching.h>
41 return -EPERM; in __patch_mem()
86 struct mm_struct *orig_mm = current->active_mm; in start_using_temp_mm()
115 return -1; in text_area_cpu_up()
118 // Map/unmap the area to ensure all page tables are pre-allocated in text_area_cpu_up()
119 addr = (unsigned long)area->addr; in text_area_cpu_up()
163 * Choose a random page-aligned address from the interval in text_area_cpu_up_mm()
164 * [PAGE_SIZE .. DEFAULT_MAP_WINDOW - PAGE_SIZE]. in text_area_cpu_up_mm()
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