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/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-vpu-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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H A Dfsl,imx8mq-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mq-vpu-blk-ctrl
25 '#power-domain-cells':
28 power-domains:
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H A Dfsl,imx8mp-hsio-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
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H A Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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H A Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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H A Dfsl,imx8mp-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
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/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c1 // SPDX-License-Identifier: GPL-2.0
60 static u32 get_valid_inputs(struct block_header *blk) in get_valid_inputs() argument
65 for (i = 0; i < PIPELINE_INFO_N_VALID_INPUTS(blk->pipeline_info); i++) { in get_valid_inputs()
66 get_resources_id(blk->input_ids[i], NULL, &comp_id); in get_valid_inputs()
117 if (!d71->periph_addr) in __get_blk_line_size()
125 return __get_blk_line_size(d71, reg, d71->max_line_size); in get_blk_line_size()
178 struct komeda_component_output *input = &st->inputs[idx]; in to_d71_input_id()
181 if (has_bit(idx, st->active_inputs)) in to_d71_input_id()
182 return input->component->hw_id + input->output_port; in to_d71_input_id()
191 struct drm_framebuffer *fb = &kfb->base; in d71_layer_update_fb()
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx93-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 and extensions to them are controlled by i.MX93 media blk-ctrl.
18 - $ref: snps,dw-mipi-dsi.yaml#
22 const: fsl,imx93-mipi-dsi
26 - description: apb clock
27 - description: pixel clock
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H A Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
22 - fsl,imx93-ldb
27 clock-names:
33 reg-names:
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/linux/drivers/pmdomain/imx/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
3 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
4 obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
5 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8m-blk-ctrl.o
6 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8mp-blk-ctrl.o
7 obj-$(CONFIG_SOC_IMX9) += imx93-pd.o
8 obj-$(CONFIG_IMX9_BLK_CTRL) += imx93-blk-ctrl.o
H A Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/power/imx8mm-power.h>
20 #include <dt-bindings/power/imx8mn-power.h>
21 #include <dt-bindings/power/imx8mp-power.h>
22 #include <dt-bindings/power/imx8mq-power.h>
53 * an if-statement should be used before setting and clearing this
88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
95 pm_runtime_put_noidle(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
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H A Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
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/linux/drivers/pci/hotplug/
H A Dibmphp_ebda.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2001,2003 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2001-2003 IBM Corp.
26 * POST builds data blocks(in this data block definition, a char-1
27 * byte, short(or word)-2 byte, long(dword)-4 byte) in the Extended
28 * BIOS Data Area which describe the configuration of the hot-plug
29 * controllers and resources used by the PCI Hot-Plug devices.
76 controller->slots = slots; in alloc_ebda_hpc()
81 controller->buses = buses; in alloc_ebda_hpc()
85 kfree(controller->slots); in alloc_ebda_hpc()
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/linux/include/acpi/
H A Dactbl.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl.h - Basic ACPI Table Definitions
6 * Copyright (C) 2000 - 2025, Intel Corp.
18 * by ACPICA. All other tables are consumed by the OS-dependent ACPI-related
44 * All tables and structures must be byte-packed to match the ACPI
54 * essentially useless for dealing with packed data in on-disk formats or
82 * GAS - Generic Address Structure (ACPI 2.0+)
86 * 64-bit Address field must be performed with care.
95 u64 address; /* 64-bit address of struct or register */
100 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
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/linux/drivers/usb/gadget/function/
H A Df_midi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * f_midi2.c -- USB MIDI 2.0 class function driver
21 #include <linux/usb/midi-v2.h>
32 unsigned int index; /* array index: 0-31 */
85 struct f_midi2_usb_ep ep_in; /* USB MIDI EP-in */
86 struct f_midi2_usb_ep ep_out; /* USB MIDI EP-out */
88 u8 in_group_to_cable[SNDRV_UMP_MAX_GROUPS]; /* map to cable; 1-based! */
97 /* 1-based GTB id to string id */
98 #define gtb_to_str_id(id) (STR_GTB1 + (id) - 1)
128 /* conversion for MIDI 1.0 EP-in */
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/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-blkctl.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "dcss-dev.h"
31 if (blkctl->dcss->hdmi_output) in dcss_blkctl_cfg()
32 dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
35 blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
38 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL); in dcss_blkctl_cfg()
45 blkctl = devm_kzalloc(dcss->dev, sizeof(*blkctl), GFP_KERNEL); in dcss_blkctl_init()
47 return -ENOMEM; in dcss_blkctl_init()
49 blkctl->base_reg = devm_ioremap(dcss->dev, blkctl_base, SZ_4K); in dcss_blkctl_init()
50 if (!blkctl->base_reg) { in dcss_blkctl_init()
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_flex_pipe.c1 // SPDX-License-Identifier: GPL-2.0
77 * ice_sect_id - returns section ID
78 * @blk: block type
84 static u32 ice_sect_id(enum ice_block blk, enum ice_sect sect) in ice_sect_id() argument
86 return ice_sect_lkup[blk][sect]; in ice_sect_id()
90 * ice_hw_ptype_ena - check if the PTYPE is enabled or not
97 test_bit(ptype, hw->hw_ptype); in ice_hw_ptype_ena()
112 * ice_gen_key_word - generate 16-bits of a key/mask word
120 * This function generates 16-bits from a 8-bit value, an 8-bit don't care mask
121 * and an 8-bit never match mask. The 16-bits of output are divided into 8 bits
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/linux/drivers/mtd/nand/raw/
H A Dfsl_elbc_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright © 2006-2007, 2010 Freescale Semiconductor
9 * Roy Zang <tie-fei.zang@freescale.com>
38 struct fsl_lbc_ctrl *ctrl; member
74 if (section >= chip->ecc.steps) in fsl_elbc_ooblayout_ecc()
75 return -ERANGE; in fsl_elbc_ooblayout_ecc()
77 oobregion->offset = (16 * section) + 6; in fsl_elbc_ooblayout_ecc()
78 if (priv->fmr & FMR_ECCM) in fsl_elbc_ooblayout_ecc()
79 oobregion->offset += 2; in fsl_elbc_ooblayout_ecc()
81 oobregion->length = chip->ecc.bytes; in fsl_elbc_ooblayout_ecc()
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/linux/drivers/clk/imx/
H A Dclk-imx95-blk-ctl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2024-2025 NXP
6 #include <dt-bindings/clock/nxp,imx94-clock.h>
7 #include <dt-bindings/clock/nxp,imx95-clock.h>
9 #include <linux/clk-provider.h>
352 struct device *dev = &pdev->dev; in imx95_bc_probe()
361 return -ENOMEM; in imx95_bc_probe()
362 bc->dev = dev; in imx95_bc_probe()
363 dev_set_drvdata(&pdev->dev, bc); in imx95_bc_probe()
365 spin_lock_init(&bc->lock); in imx95_bc_probe()
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/linux/drivers/firmware/cirrus/
H A Dcs_dsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs_dsp.c -- Cirrus Logic DSP firmware support
8 * Copyright (C) 2015-2021 Cirrus Logic, Inc. and
26 dev_err(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
28 dev_warn(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
30 dev_info(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
32 dev_dbg(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
69 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
70 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
71 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
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/linux/drivers/nvme/host/
H A Drdma.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
14 #include <linux/blk-mq.h>
15 #include <linux/blk-integrity.h>
25 #include <linux/nvme-rdma.h>
89 struct nvme_rdma_ctrl *ctrl; member
125 struct nvme_ctrl ctrl; member
130 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) in to_rdma_ctrl() argument
132 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); in to_rdma_ctrl()
161 return queue - queue->ctrl->queues; in nvme_rdma_queue_idx()
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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/linux/Documentation/nvme/
H A Dnvme-pci-endpoint-target.rst1 .. SPDX-License-Identifier: GPL-2.0
57 -----------------------
78 ------------------
90 ------------------------------------------------------
96 1) One memory window for raising MSI or MSI-X interrupts
110 -----------------------------
120 the number of MSI-X or MSI vectors available.
127 Limitations and NVMe Specification Non-Compliance
128 -------------------------------------------------
142 -------------------
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/linux/sound/pci/trident/
H A Dtrident.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 #define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1)
36 #define TRID_REG(trident, x) ((trident)->port + (x))
81 #define LEGACY_DMAR6 0x06 // CNT0 - High bits
107 /* MPU-401 UART */
146 /* AC-97 Registers */
166 /* ACR1-3 */
229 #define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */
230 #define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */
231 #define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */
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