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/linux/Documentation/netlink/specs/
H A Dnftables.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
4 protocol: netlink-raw
11 -
15 -
16 name: nfgen-family
18 -
21 -
22 name: res-id
23 byte-order: big-endian
25 -
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/linux/arch/mips/include/asm/sgi/
H A Dhpc3.h22 #define HPCDMA_EOX 0x80000000 /* last desc in chain for tx */
23 #define HPCDMA_EOR 0x80000000 /* last desc in chain for rx */
26 #define HPCDMA_XIE 0x20000000 /* irq generated when at end of this desc */
39 volatile u32 pbdma_dptr; /* pbus dma channel desc ptr */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
48 #define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
73 #define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
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/linux/net/sunrpc/auth_gss/
H A Dgss_krb5_keys.c73 * krb5_nfold - n-fold function
79 * This is the n-fold function as described in rfc3961, sec 5.1
104 for (i = ulcm-1; i >= 0; i--) { in krb5_nfold()
109 ((inbits << 3) - 1) in krb5_nfold()
115 + ((inbits - (i % inbits)) << 3) in krb5_nfold()
119 byte += (((in[((inbits - 1) - (msbit >> 3)) % inbits] << 8)| in krb5_nfold()
120 (in[((inbits) - (msbit >> 3)) % inbits])) in krb5_nfold()
134 for (i = outbits - 1; i >= 0; i--) { in krb5_nfold()
158 int ret = -EINVAL; in krb5_DK()
160 keybytes = gk5e->keybytes; in krb5_DK()
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/linux/drivers/comedi/drivers/
H A Dni_usb6501.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Comedi driver for National Instruments USB-6501
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: National Instruments USB-6501 module
13 * Devices: [National Instruments] USB-6501 (ni_usb6501)
24 * NI-6501 - USB PROTOCOL DESCRIPTION
27 * - request (out)
28 * - response (in)
39 * byte 5 is the total packet length - 4
75 * RES: 00 01 00 10 00 0C 01 00 00 00 00 02 <u32 counter value, Big Endian>
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/linux/arch/sh/boards/mach-rsk/
H A Ddevices-rsk7203.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008 - 2010 Paul Mundt
42 .id = -1,
57 .default_trigger = "nand-disk",
79 .name = "leds-gpio",
80 .id = -1,
91 .desc = "SW1",
96 .desc = "SW2",
101 .desc = "SW3",
112 .name = "gpio-keys-polled",
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/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_api_cmd.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
34 (1 << (fls(cell_size - 1))) : API_CMD_CELL_SIZE_MIN)
49 #define MASKED_IDX(chain, idx) ((idx) & ((chain)->num_cells - 1))
91 enum hinic_api_cmd_chain_type chain_type = chain->chain_type; in set_prod_idx()
92 struct hinic_hwif *hwif = chain->hwif; in set_prod_idx()
100 prod_idx |= HINIC_API_CMD_PI_SET(chain->prod_idx, IDX); in set_prod_idx()
109 addr = HINIC_CSR_API_CMD_STATUS_ADDR(chain->chain_type); in get_hw_cons_idx()
110 val = hinic_hwif_read_reg(chain->hwif, addr); in get_hw_cons_idx()
119 addr = HINIC_CSR_API_CMD_STATUS_ADDR(chain->chain_type); in dump_api_chain_reg()
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H A Dhinic_hw_eqs.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/dma-mapping.h>
28 (ALIGN((eq)->q_len * (eq)->elem_size, pg_size) / (pg_size))
30 #define GET_EQ_NUM_ELEMS_IN_PG(eq, pg_size) ((pg_size) / (eq)->elem_size)
32 #define EQ_CONS_IDX_REG_ADDR(eq) (((eq)->type == HINIC_AEQ) ? \
33 HINIC_CSR_AEQ_CONS_IDX_ADDR((eq)->q_id) : \
34 HINIC_CSR_CEQ_CONS_IDX_ADDR((eq)->q_id))
36 #define EQ_PROD_IDX_REG_ADDR(eq) (((eq)->type == HINIC_AEQ) ? \
37 HINIC_CSR_AEQ_PROD_IDX_ADDR((eq)->q_id) : \
38 HINIC_CSR_CEQ_PROD_IDX_ADDR((eq)->q_id))
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/linux/drivers/net/vmxnet3/
H A Dvmxnet3_defs.h4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
73 #define VMXNET3_REG_ALIGN 8 /* All registers are 8-byte aligned. */
133 * Little Endian layout of bitfields -
139 * Big Endian layout of bitfields -
145 * Thus, le32_to_cpu on the dword will allow the big endian driver to read
147 * bit fields written by big endian driver to format required by device.
421 /* # of tx desc needed for a tx buffer size */
422 #define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
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/linux/drivers/usb/host/
H A Dohci.h1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
89 /* first fields are hardware-specified */
124 * big-endian PPC hardware that's the second entry.
132 struct td *td_hash; /* dma-->td hashtable */
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/linux/drivers/dma/
H A Dtxx9dmac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
17 * be configured for memory-memory or device-memory transfer, but only
18 * one channel can do alignment-free memory-memory transfer at a time
23 * make one dedicated channel for memory-memory transfer. The
56 * Redefine this macro to handle differences between 32- and 64-bit
57 * addressing, big vs. little endian, etc.
92 /* per-channel registers */
190 return ddev->have_64bit_regs; in __is_dmac64()
195 return __is_dmac64(dc->ddev); in is_dmac64()
199 /* Hardware descriptor definition. (for simple-chain) */
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H A Dste_dma40.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Size is in the units of addr-widths (1,2,4,8 bytes)
10 * Larger transfers will be split up to multiple linked desc
15 #define STEDMA40_DEV_DST_MEMORY (-1)
16 #define STEDMA40_DEV_SRC_MEMORY (-1)
38 /* The value 4 indicates that PEN-reg shall be set to 0 */
63 * struct stedma40_half_channel_info - dst/src channel configuration
65 * @big_endian: true if the src/dst should be read as big endian
78 * struct stedma40_chan_cfg - Structure to be filled by client drivers.
81 * @high_priority: true if high-priority
H A Dfsl-edma-common.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Freescale Semiconductor, Inc
11 #include <linux/dma-mapping.h>
15 #include "fsl-edma-common.h"
49 spin_lock(&fsl_chan->vchan.lock); in fsl_edma_tx_chan_handler()
51 if (!fsl_chan->edesc) { in fsl_edma_tx_chan_handler()
53 spin_unlock(&fsl_chan->vcha in fsl_edma_tx_chan_handler()
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/linux/drivers/irqchip/
H A Dirq-bcm6345-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
39 * 0x1000_0050: CPU1_W0_STATUS IRQs 96-127
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/linux/fs/ext2/
H A Dialloc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Laboratoire MASI - Institut Blaise Pascal
10 * BSD ufs-inspired inode and directory allocation by
12 * Big-endian to little-endian byte-swapping/bitmaps by
18 #include <linux/backing-dev.h>
49 struct ext2_group_desc *desc; in read_inode_bitmap() local
52 desc = ext2_get_group_desc(sb, block_group, NULL); in read_inode_bitmap()
53 if (!desc) in read_inode_bitmap()
56 bh = sb_bread(sb, le32_to_cpu(desc->bg_inode_bitmap)); in read_inode_bitmap()
59 "Cannot read inode bitmap - " in read_inode_bitmap()
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H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Laboratoire MASI - Institut Blaise Pascal
11 * Big-endian to little-endian byte-swapping/bitmaps by
45 struct ext2_group_desc * desc; in ext2_get_group_desc() local
48 if (block_group >= sbi->s_groups_count) { in ext2_get_group_desc()
49 WARN(1, "block_group >= groups_count - " in ext2_get_group_desc()
51 block_group, sbi->s_groups_count); in ext2_get_group_desc()
57 offset = block_group & (EXT2_DESC_PER_BLOCK(sb) - 1); in ext2_get_group_desc()
58 if (!sbi->s_group_desc[group_desc]) { in ext2_get_group_desc()
59 WARN(1, "Group descriptor not loaded - " in ext2_get_group_desc()
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/linux/drivers/usb/gadget/udc/
H A Dfsl_usb2_udc.h1 // SPDX-License-Identifier: GPL-2.0+
19 /* USB DR device mode registers (Little Endian) */
46 u32 otgsc; /* On-The-Go Status and Control */
56 /* USB DR host mode registers (Little Endian) */
83 u32 otgsc; /* On-The-Go Status and Control */
93 /* non-EHCI USB system interface registers (Big Endian) */
139 /* bit 9-8 are async schedule park mode count */
146 /* bit 23-16 are interrupt threshold control */
213 /* bit 11-10 are line status */
220 /* bit 15-14 are port indicator control */
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/linux/net/netfilter/
H A Dnft_cmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2009 Patrick McHardy <kaber@trash.net>
33 d = memcmp(&regs->data[priv->sreg], &priv->data, priv->len); in nft_cmp_eval()
34 switch (priv->op) { in nft_cmp_eval()
63 regs->verdict.code = NFT_BREAK; in nft_cmp_eval()
76 struct nft_data_desc desc = { in nft_cmp_init() local
78 .size = sizeof(priv->data), in nft_cmp_init()
82 err = nft_data_init(NULL, &priv->data, &desc, tb[NFTA_CMP_DATA]); in nft_cmp_init()
86 err = nft_parse_register_load(ctx, tb[NFTA_CMP_SREG], &priv->sreg, desc.len); in nft_cmp_init()
90 priv->op = ntohl(nla_get_be32(tb[NFTA_CMP_OP])); in nft_cmp_init()
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/linux/net/core/
H A Dnet_test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 /* skb_segment expects skb->data at start of payload */ in __init_skb()
23 skb->protocol = htons(ETH_P_ATALK); in __init_skb()
24 skb_shinfo(skb)->gso_size = GSO_TEST_SIZE; in __init_skb()
140 static void gso_test_case_to_desc(struct gso_test_case *t, char *desc) in gso_test_case_to_desc() argument
142 sprintf(desc, "%s", t->name); in gso_test_case_to_desc()
156 tcase = test->param_value; in gso_test_func()
160 skb = build_skb(page_address(page), sizeof(hdr) + tcase->linear_len + shinfo_size); in gso_test_func()
162 __skb_put(skb, sizeof(hdr) + tcase->linear_len); in gso_test_func()
166 if (tcase->nr_frags) { in gso_test_func()
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/linux/drivers/crypto/ccp/
H A Dccp-ops.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2019 Advanced Micro Devices, Inc.
11 #include <linux/dma-mapping.h>
19 #include "ccp-dev.h"
56 #define CCP_NEW_JOBID(ccp) ((ccp->vdata->version == CCP_VERSION(3, 0)) ? \
61 return atomic_inc_return(&ccp->current_id) & CCP_JOBID_MASK; in ccp_gen_jobid()
66 if (wa->dma_count) in ccp_sg_free()
67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir); in ccp_sg_free()
69 wa->dma_count = 0; in ccp_sg_free()
78 wa->sg = sg; in ccp_init_sg_workarea()
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/linux/drivers/net/wan/
H A Dwanxl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * - Only DTE (external clock) support with NRZ and NRZI encodings
10 * - wanXL100 will require minor driver modifications, no access to hw
29 #include <linux/dma-mapping.h>
42 /* MAILBOX #1 - PUTS COMMANDS */
45 #define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */
47 #define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */
50 /* MAILBOX #2 - DRAM SIZE */
57 int node; /* physical port #0 - 3 */
78 struct port ports[]; /* 1 - 4 port structures follow */
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/linux/arch/mips/ath25/
H A Dar2315_regs.h11 * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
97 #define AR2315_ARB_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
106 #define AR2315_CONFIG_AHB 0x00000001 /* EC-AHB bridge endian */
108 #define AR2315_CONFIG_MPEGTS_RSVD 0x00000004 /* MPEG-TS byteswap */
110 #define AR2315_CONFIG_MEMCTL 0x00000010 /* Mem controller endian */
114 #define AR2315_CONFIG_CPU 0x00000400 /* CPU big endian */
128 /* Revision Register - Initial value is 0x3010 (WMAC 3.0, AR231X 1.0). */
172 #define AR2315_GISR_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
303 * - No read or write buffers are included.
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/linux/drivers/gpu/drm/tiny/
H A Dili9486.c1 // SPDX-License-Identifier: GPL-2.0+
39 * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
40 * in front of the display controller. This means that 8-bit values have to be
41 * transferred as 16-bit.
46 struct spi_device *spi = mipi->spi; in waveshare_command()
55 return -ENOMEM; in waveshare_command()
58 * The displays are Raspberry Pi HATs and connected to the 8-bit only in waveshare_command()
59 * SPI controller, so 16-bit command and parameters need byte swapping in waveshare_command()
60 * before being transferred as 8-bit on the big endian SPI bus. in waveshare_command()
63 spi_bus_lock(spi->controller); in waveshare_command()
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/linux/drivers/scsi/lpfc/
H A Dlpfc_hw.h4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
50 #define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */
51 #define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */
52 #define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 extra command ring entries */
53 #define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 extra response ring entries */
54 #define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */
55 #define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */
56 #define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */
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/linux/drivers/net/ethernet/tundra/
H A Dtsi108_eth.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * net/tsi108_eth.h - definitions for Tsi108 GIGE network controller.
20 out_be32((data->regs + (offset)), val)
23 in_be32((data->regs + (offset)))
26 out_be32((data->phyregs + (offset)), val)
29 in_be32((data->phyregs + (offset)))
252 /* Station Enable -- accept packets destined for us */
254 /* Unicast Frame Enable -- for packets not destined for us */
288 #define TSI108_TX_VLAN (1 << 2) /* Per-frame VLAN: enables VLAN override */
301 /* Note: the descriptor layouts assume big-endian byte order. */
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/linux/arch/parisc/kernel/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1999-2000 Grant Grundler
27 #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
30 ** Numbered *Big Endian*! (ie bit 0 is MSB)
36 ** between ->ack() and ->end() of the interrupt to prevent
37 ** re-interruption of a processing interrupt.
43 unsigned long eirr_bit = EIEM_MASK(d->irq); in cpu_mask_irq()
66 __cpu_unmask_irq(d->irq); in cpu_unmask_irq()
71 unsigned long mask = EIEM_MASK(d->irq); in cpu_ack_irq()
86 unsigned long mask = EIEM_MASK(d->irq); in cpu_eoi_irq()
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