/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /omit-if-no-ref/ 8 pcfg_pull_up: pcfg-pull-up { 9 bias-pull-up; 12 /omit-if-no-ref/ 13 pcfg_pull_down: pcfg-pull-down { 14 bias-pull-down; 17 /omit-if-no-ref/ 18 pcfg_pull_none: pcfg-pull-none { 19 bias-disable; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7180-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include "sc7180-firmware-tfa.dtsi" 20 compatible = "qcom,sc7180-idp", "qcom,sc7180"; 30 stdout-path = "serial0:115200n8"; 42 /delete-node/ &hyp_mem; 43 /delete-node/ &xbl_mem; [all …]
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H A D | sc7280-idp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9 #include <dt-bindings/input/linux-event-codes.h> 15 #include "sc7280-chrome-common.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi" 25 max98360a: audio-codec-0 { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&_en>; 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 30 #sound-dai-cells = <0>; [all …]
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H A D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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H A D | sa8540p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include "sa8540p-pmics.dtsi" 17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p"; 29 stdout-path = "serial0:115200n8"; 34 regulators-0 { 35 compatible = "qcom,pm8150-rpmh-regulators"; 36 qcom,pmic-id = "a"; [all …]
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/linux/arch/arm64/boot/dts/toshiba/ |
H A D | tmpv7708_pins.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 spi0_pins: spi0-pins { 8 spi1_pins: spi1-pins { 12 spi2_pins: spi2-pins { 16 spi3_pins: spi3-pins { 20 spi4_pins: spi4-pins { 24 spi5_pins: spi5-pins { 28 spi6_pins: spi6-pins { 32 uart0_pins: uart0-pins { 36 uart1_pins: uart1-pins { [all …]
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 7 #include "qcom-msm8660.dtsi" 12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 19 stdout-path = "serial0:115200n8"; 23 vph: regulator-fixed { [all …]
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H A D | qcom-apq8064-sony-xperia-lagan-yuga.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/gpio/gpio.h> 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/mfd/qcom-rpm.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7 #include "qcom-apq8064-v2.0.dtsi" 13 compatible = "sony,xperia-yuga", "qcom,apq8064"; 14 chassis-type = "handset"; 21 stdout-path = "serial0:115200n8"; 24 gpio-keys { [all …]
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H A D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 sdcc1_default_state: sdcc1-default-state { 5 clk-pins { 7 drive-strength = <16>; 8 bias-disable; 11 cmd-pins { 13 drive-strength = <10>; 14 bias-pull-up; 17 data-pins { 19 drive-strength = <10>; [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | ste-href-ab8500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "ste-ab8500.dtsi" 13 pinctrl-names = "default", "sleep"; 14 pinctrl-0 = <&usb_a_1_default>; 15 pinctrl-1 = <&usb_a_1_sleep>; 20 regulator-name = "V-DISPLAY"; 24 regulator-name = "V-eMMC1"; 28 regulator-name = "V-MMC-SD"; 32 regulator-name = "V-INTCORE"; 36 regulator-name = "V-TVOUT"; [all …]
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H A D | ste-href-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "ste-ab8505.dtsi" 13 pinctrl-names = "default", "sleep"; 14 pinctrl-0 = <&usb_a_1_default>; 15 pinctrl-1 = <&usb_a_1_sleep>; 20 regulator-name = "V-DISPLAY"; 24 regulator-name = "V-eMMC1"; 28 regulator-name = "V-MMC-SD"; 32 regulator-name = "V-INTCORE"; 36 regulator-name = "V-TVOUT"; [all …]
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H A D | stm32mp13-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 9 /omit-if-no-ref/ 10 adc1_pins_a: adc1-pins-0 { 16 /omit-if-no-ref/ 17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { 24 /omit-if-no-ref/ 25 adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { 32 /omit-if-no-ref/ [all …]
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H A D | stm32mp15-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 9 /omit-if-no-ref/ 10 adc1_ain_pins_a: adc1-ain-0 { 21 /omit-if-no-ref/ 22 adc1_in6_pins_a: adc1-in6-0 { 28 /omit-if-no-ref/ 29 adc1_in10_pins_a: adc1-in10-0 { 35 /omit-if-no-ref/ [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 27 stdout-path = "serial0:921600n8"; 30 reserved-memory { 31 #address-cells = <2>; 32 #size-cells = <2>; 35 compatible = "shared-dma-pool"; 37 no-map; [all …]
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H A D | mt8390-genio-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Author: Chris Chen <chris-qj.chen@mediatek.com> 9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/interrupt-controller/irq.h> 17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 19 #include <dt-bindings/spmi/spmi.h> 20 #include <dt-bindings/usb/pd.h> [all …]
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H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&panel_backlight_en_pins>; [all …]
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H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 26 compatible = "led-backlight"; 29 default-brightness-level = <300>; 32 led-controller-display { 33 compatible = "pwm-leds"; 35 disp_led_pwm: led-0 { [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt8195-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: 32 gpio-line-names: true [all …]
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H A D | mediatek,mt8186-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: 31 gpio-line-names: true [all …]
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H A D | spacemit,k1-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/spacemit,k1-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yixun Lan <dlan@gentoo.org> 14 const: spacemit,k1-pinctrl 18 - description: pinctrl io memory base 21 '-cfg$': 30 '-pins$': 36 be configured, with regard to muxer configuration, bias pull, [all …]
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H A D | ti,da850-pupd.txt | 1 * Pin configuration for TI DA850/OMAP-L138/AM18x 3 These SoCs have a separate controller for setting bias (internal pullup/down). 4 Bias can only be selected for groups rather than individual pins. 8 - compatible: Must be "ti,da850-pupd" 9 - reg: Base address and length of the memory resource used by the pullup/down 17 - groups: An array of strings, each string containing the name of a pin group. 21 pinctrl-bindings.txt in this directory. The supported parameters are 22 bias-disable, bias-pull-up, bias-pull-down. 26 ------- 30 pinconf: pin-controller@22c00c { [all …]
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H A D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl". 8 - reg: The register address of pin controller device. 9 - pins : An array of strings, each string containing the name of a pin. 12 - function: A string containing the name of the function, values must be 14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10, 16 - input-schmitt-disable: Enable schmitt-trigger mode. 17 - input-schmitt-enable: Disable schmitt-trigger mode. 18 - bias-disable: Disable pin bias. 19 - bias-pull-down: Pull down on pin. 20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor [all …]
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H A D | starfive,jh7100-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd. 14 configurable bias, drive strength, schmitt trigger etc. The SoC has an 15 interesting 2-layered approach to pin muxing best illustrated by the diagram 21 LCD output -----------------| | 22 CMOS Camera interface ------| |--- PAD_GPIO[0] 23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1] [all …]
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-zc1751-xm019-dc5.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm019-dc5 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 33 stdout-path = "serial0:115200n8"; [all …]
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7100-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h> 21 stdout-path = "serial0:115200n8"; 25 timebase-frequency = <6250000>; 34 compatible = "gpio-leds"; 36 led-ack { 40 linux,default-trigger = "heartbeat"; [all …]
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