Lines Matching +full:bias +full:- +full:pull +full:- +full:up
1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
39 regulator-name = "vreg_l3a";
40 regulator-min-microvolt = <1200000>;
41 regulator-max-microvolt = <1208000>;
42 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
46 regulator-name = "vreg_l5a";
47 regulator-min-microvolt = <912000>;
48 regulator-max-microvolt = <912000>;
49 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
53 regulator-name = "vreg_l7a";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
56 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
60 regulator-name = "vreg_l11a";
61 regulator-min-microvolt = <880000>;
62 regulator-max-microvolt = <880000>;
63 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
67 regulator-name = "vreg_l13a";
68 regulator-min-microvolt = <3072000>;
69 regulator-max-microvolt = <3072000>;
70 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
74 regulators-1 {
75 compatible = "qcom,pm8150-rpmh-regulators";
76 qcom,pmic-id = "c";
79 regulator-name = "vreg_l1c";
80 regulator-min-microvolt = <912000>;
81 regulator-max-microvolt = <912000>;
82 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
86 regulator-name = "vreg_l2c";
87 regulator-min-microvolt = <3072000>;
88 regulator-max-microvolt = <3072000>;
89 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
93 regulator-name = "vreg_l4c";
94 regulator-min-microvolt = <1200000>;
95 regulator-max-microvolt = <1208000>;
96 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
100 regulator-name = "vreg_l6c";
101 regulator-min-microvolt = <1200000>;
102 regulator-max-microvolt = <1200000>;
103 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
104 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
106 regulator-allow-set-load;
110 regulator-name = "vreg_l7c";
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
117 regulator-name = "vreg_l17c";
118 regulator-min-microvolt = <2504000>;
119 regulator-max-microvolt = <2504000>;
120 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
121 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
123 regulator-allow-set-load;
127 regulators-2 {
128 compatible = "qcom,pm8150-rpmh-regulators";
129 qcom,pmic-id = "g";
132 regulator-name = "vreg_l3g";
133 regulator-min-microvolt = <1200000>;
134 regulator-max-microvolt = <1200000>;
135 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
139 regulator-name = "vreg_l7g";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <1800000>;
142 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
146 regulator-name = "vreg_l8g";
147 regulator-min-microvolt = <880000>;
148 regulator-max-microvolt = <880000>;
149 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
155 snps,mtl-rx-config = <ðernet0_mtl_rx_setup>;
156 snps,mtl-tx-config = <ðernet0_mtl_tx_setup>;
158 phy-handle = <&rgmii_phy>;
159 phy-mode = "rgmii-txid";
161 pinctrl-names = "default";
162 pinctrl-0 = <ðernet0_default>;
167 compatible = "snps,dwmac-mdio";
168 #address-cells = <1>;
169 #size-cells = <0>;
173 compatible = "ethernet-phy-id0141.0dd4";
176 interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>;
178 reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>;
179 reset-assert-us = <11000>;
180 reset-deassert-us = <70000>;
182 device_type = "ethernet-phy";
184 /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation
187 marvell,reg-init =
195 ethernet0_mtl_rx_setup: rx-queues-config {
196 snps,rx-queues-to-use = <1>;
197 snps,rx-sched-sp;
200 snps,dcb-algorithm;
201 snps,map-to-dma-channel = <0x0>;
202 snps,route-up;
207 snps,dcb-algorithm;
208 snps,map-to-dma-channel = <0x1>;
209 snps,route-ptp;
213 snps,avb-algorithm;
214 snps,map-to-dma-channel = <0x2>;
215 snps,route-avcp;
219 snps,avb-algorithm;
220 snps,map-to-dma-channel = <0x3>;
225 ethernet0_mtl_tx_setup: tx-queues-config {
226 snps,tx-queues-to-use = <1>;
229 snps,dcb-algorithm;
233 snps,dcb-algorithm;
237 snps,avb-algorithm;
245 snps,avb-algorithm;
255 snps,mtl-rx-config = <ðernet1_mtl_rx_setup>;
256 snps,mtl-tx-config = <ðernet1_mtl_tx_setup>;
258 phy-mode = "rgmii-txid";
260 pinctrl-names = "default";
261 pinctrl-0 = <ðernet1_default>;
265 fixed-link {
267 full-duplex;
270 ethernet1_mtl_rx_setup: rx-queues-config {
271 snps,rx-queues-to-use = <1>;
272 snps,rx-sched-sp;
275 snps,dcb-algorithm;
276 snps,map-to-dma-channel = <0x0>;
277 snps,route-up;
282 snps,dcb-algorithm;
283 snps,map-to-dma-channel = <0x1>;
284 snps,route-ptp;
288 snps,avb-algorithm;
289 snps,map-to-dma-channel = <0x2>;
290 snps,route-avcp;
294 snps,avb-algorithm;
295 snps,map-to-dma-channel = <0x3>;
300 ethernet1_mtl_tx_setup: tx-queues-config {
301 snps,tx-queues-to-use = <1>;
304 snps,dcb-algorithm;
308 snps,dcb-algorithm;
312 snps,avb-algorithm;
320 snps,avb-algorithm;
330 pinctrl-names = "default";
331 pinctrl-0 = <&i2c0_default>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&i2c1_default>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&i2c12_default>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&i2c15_default>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&i2c18_default>;
369 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
370 wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
372 pinctrl-names = "default";
373 pinctrl-0 = <&pcie2a_default>;
379 vdda-phy-supply = <&vreg_l11a>;
380 vdda-pll-supply = <&vreg_l3a>;
390 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
391 wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
393 pinctrl-names = "default";
394 pinctrl-0 = <&pcie3a_default>;
400 vdda-phy-supply = <&vreg_l11a>;
401 vdda-pll-supply = <&vreg_l3a>;
407 nvmem-cells = <&rtc_offset>;
408 nvmem-cell-names = "offset";
416 rtc_offset: rtc-offset@a0 {
434 firmware-name = "qcom/sa8540p/cdsp0.mbn";
439 firmware-name = "qcom/sa8540p/cdsp1.mbn";
444 compatible = "qcom,geni-debug-uart";
449 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
451 vcc-supply = <&vreg_l17c>;
452 vccq-supply = <&vreg_l6c>;
458 vdda-phy-supply = <&vreg_l8g>;
459 vdda-pll-supply = <&vreg_l3g>;
473 vdda-pll-supply = <&vreg_l5a>;
474 vdda18-supply = <&vreg_l7a>;
475 vdda33-supply = <&vreg_l13a>;
481 vdda-phy-supply = <&vreg_l3a>;
482 vdda-pll-supply = <&vreg_l5a>;
488 vdda-pll-supply = <&vreg_l5a>;
489 vdda18-supply = <&vreg_l7g>;
490 vdda33-supply = <&vreg_l13a>;
496 vdda-phy-supply = <&vreg_l3a>;
497 vdda-pll-supply = <&vreg_l5a>;
503 clock-frequency = <38400000>;
509 ethernet0_default: ethernet0-default-state {
510 mdc-pins {
513 drive-strength = <16>;
514 bias-pull-up;
517 mdio-pins {
520 drive-strength = <16>;
521 bias-pull-up;
524 rgmii-tx-pins {
527 drive-strength = <16>;
528 bias-pull-up;
531 rgmii-rx-pins {
534 drive-strength = <16>;
535 bias-disable;
539 ethernet1_default: ethernet1-default-state {
540 mdc-pins {
543 drive-strength = <16>;
544 bias-pull-up;
547 mdio-pins {
550 drive-strength = <16>;
551 bias-pull-up;
554 rgmii-tx-pins {
557 drive-strength = <16>;
558 bias-pull-up;
561 rgmii-rx-pins {
564 drive-strength = <16>;
565 bias-disable;
569 i2c0_default: i2c0-default-state {
570 /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */
573 drive-strength = <2>;
574 bias-pull-up;
577 i2c1_default: i2c1-default-state {
578 /* To PM40028B-F3EI PCIe switch */
581 drive-strength = <2>;
582 bias-pull-up;
585 i2c12_default: i2c12-default-state {
589 drive-strength = <2>;
590 bias-pull-up;
593 i2c15_default: i2c15-default-state {
597 drive-strength = <2>;
598 bias-pull-up;
601 i2c18_default: i2c18-default-state {
605 drive-strength = <2>;
606 bias-pull-up;
609 pcie2a_default: pcie2a-default-state {
610 perst-pins {
613 drive-strength = <2>;
614 bias-pull-down;
617 clkreq-pins {
620 drive-strength = <2>;
621 bias-pull-up;
624 wake-pins {
627 drive-strength = <2>;
628 bias-pull-up;
632 pcie3a_default: pcie3a-default-state {
633 perst-pins {
636 drive-strength = <2>;
637 bias-pull-down;
640 clkreq-pins {
643 drive-strength = <2>;
644 bias-pull-up;
647 wake-pins {
650 drive-strength = <2>;
651 bias-pull-up;