Searched +full:bcm2836 +full:- +full:armctrl +full:- +full:ic (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | brcm,bcm2835-armctrl-ic.yaml | 2 --- 3 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml# 4 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 title: BCM2835 ARMCTRL Interrupt Controller 9 - Florian Fainelli <florian.fainelli@broadcom.com> 10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com> 13 The BCM2835 contains a custom top-level interrupt controller, which supports 14 72 interrupt sources using a 2-level register scheme. The interrupt 16 "armctrl" in the SoC documentation, hence naming of this binding. 18 The BCM2836 contains the same interrupt controller with the same interrupts, [all …]
|
/linux/drivers/irqchip/ |
H A D | irq-bcm2835.c | 1 // SPDX-License-Identifier: GPL-2.0+ 30 * Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0) 94 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]); in armctrl_mask_irq() 99 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]); in armctrl_unmask_irq() 103 .name = "ARMCTRL-level", 115 return -EINVAL; in armctrl_xlate() 118 return -EINVAL; in armctrl_xlate() 121 return -EINVAL; in armctrl_xlate() 124 return -EINVAL; in armctrl_xlate() 145 panic("%pOF: unable to map IC registers\n", node); in armctrl_of_init() [all …]
|
/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm2836.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "bcm2835-common.dtsi" 6 compatible = "brcm,bcm2836"; 11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>; 13 local_intc: interrupt-controller@40000000 { 14 compatible = "brcm,bcm2836-l1-intc"; 16 interrupt-controller; 17 #interrupt-cells = <2>; 18 interrupt-parent = <&local_intc>; 22 arm-pmu { [all …]
|
H A D | bcm2837.dtsi | 2 #include "bcm2835-common.dtsi" 10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>; 12 local_intc: interrupt-controller@40000000 { 13 compatible = "brcm,bcm2836-l1-intc"; 15 interrupt-controller; 16 #interrupt-cells = <2>; 17 interrupt-parent = <&local_intc>; 21 arm-pmu { 22 compatible = "arm,cortex-a53-pmu"; 23 interrupt-parent = <&local_intc>; [all …]
|
H A D | bcm2835-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * bcm2835, bcm2836 and bcm2837 implementations. 8 interrupt-parent = <&intc>; 11 dma: dma-controller@7e007000 { 12 compatible = "brcm,bcm2835-dma"; 25 /* dma channel 11-14 share one irq */ 32 interrupt-names = "dma0", 47 "dma-shared-all"; 48 #dma-cells = <1>; 49 brcm,dma-channel-mask = <0x7f35>; [all …]
|