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Searched +full:bcm2835 +full:- +full:armctrl +full:- +full:ic (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dbrcm,bcm-vc4.txt8 - compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4"
11 - compatible: Should be one of "brcm,bcm2835-pixelvalve0",
12 "brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2"
13 - reg: Physical base address and length of the PV's registers
14 - interrupts: The interrupt number
15 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
18 - compatible: Should be "brcm,bcm2835-hvs"
19 - reg: Physical base address and length of the HVS's registers
20 - interrupts: The interrupt number
21 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.yaml2 ---
3 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: BCM2835 ARMCTRL Interrupt Controller
9 - Florian Fainelli <florian.fainelli@broadcom.com>
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
13 The BCM2835 contains a custom top-level interrupt controller, which supports
14 72 interrupt sources using a 2-level register scheme. The interrupt
16 "armctrl" in the SoC documentation, hence naming of this binding.
19 but the per-CPU interrupt controller is the root, and an interrupt there
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H A Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
6 as "armctrl" in the SoC documentation, hence naming of this binding.
9 interrupts, but the per-CPU interrupt controller is the root, and an
10 interrupt there indicates that the ARMCTRL has an interrupt to handle.
14 - compatibl
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/freebsd/sys/contrib/device-tree/Bindings/soc/bcm/
H A Dbrcm,bcm2835-vchiq.txt5 - compatible: Should be "brcm,bcm2835-vchiq" on BCM2835, otherwise
6 "brcm,bcm2836-vchiq".
7 - reg: Physical base address and length of the doorbell register pair
8 - interrupts: The interrupt number
9 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
14 compatible = "brcm,bcm2835-vchiq";
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dbrcm,bcm2835-mbox.txt1 Broadcom BCM2835 VideoCore mailbox IPC
5 - compatible: Should be "brcm,bcm2835-mbox"
6 - reg: Specifies base physical address and size of the registers
7 - interrupts: The interrupt number
8 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
9 - #mbox-cells: Specifies the number of cells needed to encode a mailbox
16 compatible = "brcm,bcm2835-mbox";
19 #mbox-cells = <0>;
25 #power-domain-cells = <1>;
/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_intr.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
97 #define BANK1_END (BANK1_START + 32 - 1)
99 #define BANK2_END (BANK2_START + 32 - 1)
104 #define IRQ_BANK1(n) ((n) - BANK1_START)
105 #define IRQ_BANK2(n) ((n) - BANK2_START)
134 {"broadcom,bcm2835-armctrl-ic", 1},
135 {"brcm,bcm2835-armctrl-ic", 1},
136 {"brcm,bcm2836-armctrl-ic", 1},
143 bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg))
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-name
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H A Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 local_intc: interrupt-controller@40000000 {
13 compatible = "brcm,bcm2836-l1-intc";
15 interrupt-controller;
16 #interrupt-cells = <2>;
17 interrupt-parent = <&local_intc>;
21 arm-pmu {
22 compatible = "arm,cortex-a53-pmu";
23 interrupt-parent = <&local_intc>;
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H A Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
13 local_intc: interrupt-controller@40000000 {
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a7-pmu";
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