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/linux/drivers/interconnect/qcom/
H A Dbcm-voter.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <linux/interconnect-provider.h>
16 #include "bcm-voter.h"
17 #include "icc-rpmh.h"
23 * struct bcm_voter - Bus Clock Manager voter
24 * @dev: reference to the device that communicates with the BCM
25 * @np: reference to the device node to match bcm voters
26 * @lock: mutex to protect commit and wake/sleep lists in the voter
29 * @voter_node: list of bcm voters
[all …]
H A Dicc-rpmh.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/interconnect-provider.h>
16 #include "bcm-voter.h"
17 #include "icc-common.h"
18 #include "icc-rpmh.h"
21 #define QOSGEN_MAINCTL_LO(p, qp) (0x8 + (p->port_offsets[qp]))
27 * qcom_icc_set_qos - initialize static QoS configurations
34 const struct qcom_icc_qosbox *qos = node->qosbox; in qcom_icc_set_qos()
37 for (port = 0; port < qos->num_ports; port++) { in qcom_icc_set_qos()
38 regmap_update_bits(qp->regmap, QOSGEN_MAINCTL_LO(qos, port), in qcom_icc_set_qos()
[all …]
H A Dicc-rpmh.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <dt-bindings/interconnect/qcom,icc.h>
17 * struct qcom_icc_provider - Qualcomm specific interconnect provider
22 * @voter: bcm voter targeted by this provider
34 struct bcm_voter *voter; member
43 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
46 * @vcd: virtual clock domain that this bcm belongs to
59 * struct qcom_icc_qosbox - Qualcomm specific QoS config
82 * struct qcom_icc_node - Qualcomm specific interconnect nodes
110 * struct qcom_icc_bcm - Qualcomm specific hardware accelerator nodes
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_INTERCONNECT_QCOM) += interconnect_qcom.o
5 interconnect_qcom-y := icc-common.o
6 icc-bcm-voter-objs := bcm-voter.o
7 qnoc-msm8909-objs := msm8909.o
8 qnoc-msm8916-objs := msm8916.o
9 qnoc-msm8937-objs := msm8937.o
10 qnoc-msm8939-objs := msm8939.o
11 qnoc-msm8953-objs := msm8953.o
12 qnoc-msm8974-objs := msm8974.o
[all …]
H A Dbcm-voter.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <soc/qcom/cmd-db.h>
13 #include "icc-rpmh.h"
16 void qcom_icc_bcm_voter_add(struct bcm_voter *voter, struct qcom_icc_bcm *bcm);
17 int qcom_icc_bcm_voter_commit(struct bcm_voter *voter);
H A Dsdx65.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/interconnect-provider.h>
12 #include <dt-bindings/interconnect/qcom,sdx65.h>
14 #include "bcm-voter.h"
15 #include "icc-rpmh.h"
888 { .compatible = "qcom,sdx65-mc-virt",
890 { .compatible = "qcom,sdx65-mem-noc",
892 { .compatible = "qcom,sdx65-system-noc",
902 .name = "qnoc-sdx65",
H A Dsdx55.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/interconnect-provider.h>
16 #include <dt-bindings/interconnect/qcom,sdx55.h>
18 #include "bcm-voter.h"
19 #include "icc-rpmh.h"
904 { .compatible = "qcom,sdx55-mc-virt",
906 { .compatible = "qcom,sdx55-mem-noc",
908 { .compatible = "qcom,sdx55-system-noc",
918 .name = "qnoc-sdx55",
H A Dqdu1000.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/interconnect-provider.h>
13 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
15 #include "bcm-voter.h"
16 #include "icc-common.h"
17 #include "icc-rpmh.h"
1025 dev_err(&pdev->dev, "failed to register ICC provider\n"); in qnoc_probe()
1031 { .compatible = "qcom,qdu1000-clk-virt",
1034 { .compatible = "qcom,qdu1000-gem-noc",
1037 { .compatible = "qcom,qdu1000-mc-virt",
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,bcm-voter.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm BCM-Voter Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
13 The Bus Clock Manager (BCM) is a dedicated hardware accelerator that manages
22 - qcom,bcm-voter
24 qcom,tcs-wait:
42 - compatible
[all …]
H A Dqcom,rpmh-common.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <djakov@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
22 '#interconnect-cells':
[all …]
H A Dqcom,rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
27 - qcom,sc7180-aggre1-noc
28 - qcom,sc7180-aggre2-noc
[all …]
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity
27 ACTIVE - Triggered by Linux
28 SLEEP - Triggered by F/W
29 WAKE - Triggered by F/W
30 CONTROL - Triggered by F/W
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
H A Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/phy/phy-qcom-qusb2.h>
[all …]
H A Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
H A Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
15 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
H A Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Dsc8180x.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,osm-l3.h>
13 #include <dt-bindings/interconnect/qcom,sc8180x.h>
[all …]
H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
[all …]
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]

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