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Searched full:base1 (Results 1 – 25 of 36) sorted by relevance

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/linux/drivers/mfd/
H A Dmcp-sa11x0.c29 void __iomem *base1; member
40 #define MCCR1(m) ((m)->base1 + 0x00)
196 m->base1 = ioremap(mem1->start, resource_size(mem1)); in mcp_sa11x0_probe()
197 if (!m->base0 || !m->base1) { in mcp_sa11x0_probe()
224 iounmap(m->base1); in mcp_sa11x0_probe()
249 iounmap(m->base1); in mcp_sa11x0_remove()
/linux/drivers/gpio/
H A Dgpio-em.c25 void __iomem *base1; member
63 return ioread32(p->base1 + (offs - GIO_IDT0)); in em_gio_read()
72 iowrite32(value, p->base1 + (offs - GIO_IDT0)); in em_gio_write()
296 p->base1 = devm_platform_ioremap_resource(pdev, 1); in em_gio_probe()
297 if (IS_ERR(p->base1)) in em_gio_probe()
298 return PTR_ERR(p->base1); in em_gio_probe()
/linux/arch/s390/kvm/
H A Dkvm-s390.h145 u32 base1 = vcpu->arch.sie_block->ipb >> 28; in kvm_s390_get_base_disp_siy() local
153 *ar = base1; in kvm_s390_get_base_disp_siy()
155 return (base1 ? vcpu->run->s.regs.gprs[base1] : 0) + disp1; in kvm_s390_get_base_disp_siy()
162 u32 base1 = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28; in kvm_s390_get_base_disp_sse() local
167 *address1 = (base1 ? vcpu->run->s.regs.gprs[base1] : 0) + disp1; in kvm_s390_get_base_disp_sse()
171 *ar_b1 = base1; in kvm_s390_get_base_disp_sse()
/linux/Documentation/devicetree/bindings/thermal/
H A Dqcom-tsens.yaml141 - const: base1
178 - const: base1
232 - const: base1
361 "base1", "base2",
/linux/drivers/media/dvb-frontends/
H A Dzl10039.c45 BASE1, enumerator
214 ret = zl10039_writereg(state, BASE1, 0x0A); in zl10039_set_params()
222 ret = zl10039_writereg(state, BASE1, 0x6A); in zl10039_set_params()
/linux/drivers/thermal/qcom/
H A Dtsens.c77 u32 base1, base2; in tsens_read_calibration() local
96 ret = snprintf(name, sizeof(name), "base1%s", backup ? "_backup" : ""); in tsens_read_calibration()
100 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration()
135 p1[i] = p1[i] + (base1 << shift); in tsens_read_calibration()
145 p1[i] = (p1[i] + base1) << shift; in tsens_read_calibration()
212 u32 base1, base2; in tsens_read_calibration_legacy() local
221 base1 = tsens_read_cell(&format->base[0], format->base_len, cdata0, cdata1); in tsens_read_calibration_legacy()
232 p1[i] = p1[i] + (base1 << format->base_shift); in tsens_read_calibration_legacy()
240 p1[i] = (p1[i] + base1) << format->base_shift; in tsens_read_calibration_legacy()
H A Dtsens.h613 * @base: descriptors of the base0 and base1 fields
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-cygnus-mux.c92 * @base1: second I/O register base
104 void __iomem *base1; member
855 val = readl(pinctrl->base1 + mux->offset); in cygnus_gpio_request_enable()
857 writel(val, pinctrl->base1 + mux->offset); in cygnus_gpio_request_enable()
882 val = readl(pinctrl->base1 + mux->offset); in cygnus_gpio_disable_free()
884 writel(val, pinctrl->base1 + mux->offset); in cygnus_gpio_disable_free()
954 pinctrl->base1 = devm_platform_ioremap_resource(pdev, 1); in cygnus_pinmux_probe()
955 if (IS_ERR(pinctrl->base1)) { in cygnus_pinmux_probe()
957 return PTR_ERR(pinctrl->base1); in cygnus_pinmux_probe()
H A Dpinctrl-nsp-mux.c99 * @base1: second mux register
112 void __iomem *base1; member
429 base_address = pinctrl->base1; in nsp_pinmux_set()
575 pinctrl->base1 = devm_ioremap(&pdev->dev, res->start, in nsp_pinmux_probe()
577 if (!pinctrl->base1) { in nsp_pinmux_probe()
H A Dpinctrl-ns2-mux.c105 * @base1: second IOMUX register base
118 void __iomem *base1; member
613 base_address = pinctrl->base1; in ns2_pinmux_set()
1046 pinctrl->base1 = devm_ioremap(&pdev->dev, res->start, in ns2_pinmux_probe()
1048 if (!pinctrl->base1) { in ns2_pinmux_probe()
/linux/drivers/pinctrl/renesas/
H A Dpinctrl-rzt2h.c78 void __iomem *base0, *base1; member
88 ((port) > RZT2H_MAX_SAFETY_PORTS ? (pctrl)->base0 : (pctrl)->base1)
721 pctrl->base1 = devm_ioremap_resource(&pdev->dev, res); in rzt2h_pinctrl_cfg_regions()
722 if (IS_ERR(pctrl->base1)) in rzt2h_pinctrl_cfg_regions()
723 return PTR_ERR(pctrl->base1); in rzt2h_pinctrl_cfg_regions()
729 writeb(0x0, pctrl->base1 + RSELP(port)); in rzt2h_pinctrl_cfg_regions()
/linux/arch/arm/kernel/
H A Dbios32.c207 u32 base0, base1; in pci_fixup_cy82c693() local
211 base1 = 0x3f4; in pci_fixup_cy82c693()
214 base1 = 0x374; in pci_fixup_cy82c693()
220 base1 | PCI_BASE_ADDRESS_SPACE_IO); in pci_fixup_cy82c693()
/linux/drivers/clk/renesas/
H A Drenesas-cpg-mssr.c245 RZT2H_MSTPCR_BLOCK(offset) ? priv->pub.base1 : priv->pub.base0; in cpg_rzt2h_mstp_read()
255 RZT2H_MSTPCR_BLOCK(offset) ? priv->pub.base1 : priv->pub.base0; in cpg_rzt2h_mstp_write()
1268 priv->pub.base1 = of_iomap(np, 1); in cpg_mssr_common_init()
1269 if (!priv->pub.base1) { in cpg_mssr_common_init()
1320 if (priv->pub.base1) in cpg_mssr_common_init()
1321 iounmap(priv->pub.base1); in cpg_mssr_common_init()
H A Dr9a09g077-cpg.c293 void __iomem *base = RZT2H_REG_BLOCK(offset) ? pub->base1 : pub->base0; in r9a09g077_cpg_clk_register()
/linux/drivers/pci/controller/
H A Dpci-v3-semi.c264 * Base0 and Base1 can be used for any type of PCI memory access. Base2
362 * prefetchable), this frees up base1 for re-use by in v3_map_bus()
370 * Set up base1/map1 to point into configuration space. in v3_map_bus()
384 * Reassign base1 for use by prefetchable PCI memory in v3_unmap_bus()
/linux/drivers/video/
H A Daperture.c144 static bool overlap(resource_size_t base1, resource_size_t end1, in overlap() argument
147 return (base1 < end2) && (end1 > base2); in overlap()
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8084.dtsi254 tsens_base1: base1@d0 {
414 tsens_base1_backup: base1-backup@440 {
542 "base1", "base2",
H A Dqcom-msm8974.dtsi1200 "base1", "base2",
1243 tsens_base1: base1@d0 {
1403 tsens_base1_backup: base1-backup@440 {
H A Dqcom-msm8226.dtsi793 "base1", "base2",
818 tsens_base1: base1@1c1 {
/linux/drivers/net/wireless/marvell/mwifiex/
H A Dsdio.c1450 u8 base0, base1; in mwifiex_prog_fw_w_helper() local
1501 &base1); in mwifiex_prog_fw_w_helper()
1504 "dev BASE1 register read failed:\t" in mwifiex_prog_fw_w_helper()
1505 "base1=%#04X(%d). Terminating dnld\n", in mwifiex_prog_fw_w_helper()
1506 base1, base1); in mwifiex_prog_fw_w_helper()
1509 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); in mwifiex_prog_fw_w_helper()
/linux/arch/x86/hyperv/
H A Dhv_vtl.c97 (desc->base1 << 16) | desc->base0; in hv_vtl_system_desc_base()
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s.dtsi170 <0x00 0x30270000 0x00 0x30270000 0x00 0x00010000>, /* DSI-base1 */
/linux/drivers/char/tpm/
H A Dtpm_nsc.c366 dev_dbg(&pdev->dev, "NSC IO Base1 0x%x\n", in init_nsc()
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5424.dtsi348 tsens_base1: base1@41a {
424 "base1",
/linux/include/linux/
H A Dmemblock.h147 unsigned long memblock_addrs_overlap(phys_addr_t base1, phys_addr_t size1,

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