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/linux/Documentation/
H A Dmemory-barriers.txt2 LINUX KERNEL MEMORY BARRIERS
16 meant as a guide to using the various memory barriers provided by Linux, but
31 (2) to provide a guide as to how to use the barriers that are available.
51 (*) What are memory barriers?
54 - What may not be assumed about memory barriers?
55 - Address-dependency barriers (historical).
59 - Read memory barriers vs load speculation.
62 (*) Explicit kernel barriers.
65 - CPU memory barriers.
67 (*) Implicit kernel memory barriers.
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H A Datomic_t.txt54 Barriers:
160 ORDERING (go read memory-barriers.txt first)
188 The barriers:
193 ordering inherent to the op. These barriers act almost like a full smp_mb():
201 These helper barriers exist because architectures have varying implicit
203 provide full ordered atomics and these barriers are no-ops.
H A Datomic_bitops.txt28 Barriers:
68 the same barriers as for atomic_t are used, see atomic_t.txt.
/linux/arch/mips/include/asm/
H A Dsync.h13 * 1) Completion barriers, which ensure that a memory operation has actually
16 * 2) Ordering barriers, which only ensure that affected memory operations
20 * Ordering barriers can be more efficient than completion barriers, since:
22 * a) Ordering barriers only require memory access instructions which precede
57 * we're satisfied that lightweight ordering barriers defined by MIPSr6 are
66 * barrier since 2010 & omit 'rmb' barriers because the CPUs don't perform
/linux/Documentation/core-api/wrappers/
H A Dmemory-barriers.rst2 This is a simple wrapper to bring memory-barriers.txt into the RST world
6 Linux kernel memory barriers
13 .. include:: ../../memory-barriers.txt
/linux/tools/memory-model/Documentation/
H A Dordering.txt11 1. Barriers (also known as "fences"). A barrier orders some or
30 Barriers
33 Each of the following categories of barriers is described in its own
36 a. Full memory barriers.
38 b. Read-modify-write (RMW) ordering augmentation barriers.
55 Full Memory Barriers
126 RMW Ordering Augmentation Barriers
238 Note that the barriers discussed previously use barrier() or its low-level
265 improved readability and performance compared to explicit barriers.
324 and readability compared to explicit barriers. For example, use of
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H A Drecipes.txt291 Write and read memory barriers
351 weaker barriers.
481 first. Preserving order requires nothing less than full barriers:
499 values of 0, but providing both full barriers as shown above prevents
521 "if (@cond)". The full barriers prevent the undesirable outcome where
/linux/include/linux/
H A Datomic.h25 * See Documentation/memory-barriers.txt for ACQUIRE/RELEASE definitions.
36 * barriers on top of the relaxed variant. In the case where the relaxed
37 * variant is already fully ordered, no additional barriers are needed.
/linux/tools/testing/selftests/bpf/benchs/
H A Dbench_htab_mem.c106 pthread_barrier_t *barriers; in htab_mem_bench_init_barriers() local
113 barriers = calloc(nr, sizeof(*barriers)); in htab_mem_bench_init_barriers()
114 if (!barriers) in htab_mem_bench_init_barriers()
119 pthread_barrier_init(&barriers[i], NULL, 2); in htab_mem_bench_init_barriers()
121 ctx.notify = barriers; in htab_mem_bench_init_barriers()
/linux/Documentation/translations/sp_SP/wrappers/
H A Dmemory-barriers.rst2 This is a simple wrapper to bring memory-barriers.txt (Spanish
14 .. include:: ../memory-barriers.txt
/linux/Documentation/core-api/
H A Dcircular-buffers.rst15 (2) Memory barriers for when the producer and the consumer of objects in the
29 (*) Using memory barriers with circular buffers.
134 Using memory barriers with circular buffers
137 By using memory barriers in conjunction with circular buffers, you can avoid
236 See also Documentation/memory-barriers.txt for a description of Linux's memory
/linux/Documentation/virt/kvm/
H A Dvcpu-requests.rst179 [memory-barriers]_.
182 the memory barriers, allowing this requirement to be handled internally by
205 This solution also requires memory barriers to be placed carefully in both
206 the requesting thread and the receiving VCPU. With the memory barriers we
293 .. [memory-barriers] Documentation/memory-barriers.txt
/linux/tools/arch/riscv/include/asm/
H A Dbarrier.h16 /* These barriers need to enforce ordering on both devices and memory. */
21 /* These barriers do not need to enforce ordering on devices, just memory. */
/linux/tools/virtio/asm/
H A Dbarrier.h15 /* Weak barriers should be used. If not - it's a bug */
25 /* Weak barriers should be used. If not - it's a bug */
/linux/drivers/soc/qcom/
H A Dkryo-l2-accessors.c21 * Use architecturally required barriers for ordering between system register
41 * Use architecturally required barriers for ordering between system register
/linux/Documentation/arch/arm64/
H A Dlegacy_instructions.rst27 instructions, .e.g., CP15 barriers
53 * CP15 Barriers
/linux/Documentation/scheduler/
H A Dmembarrier.rst10 Memory barriers before updating rq->curr
20 Memory barriers after updating rq->curr
/linux/Documentation/translations/zh_CN/arch/arm64/
H A Dlegacy_instructions.txt42 它是那些构架中正在被淘汰的指令,如 CP15 barriers(隔离指令),的默认处理方式。
61 * CP15 Barriers
/linux/Documentation/translations/zh_TW/arch/arm64/
H A Dlegacy_instructions.txt46 它是那些構架中正在被淘汰的指令,如 CP15 barriers(隔離指令),的默認處理方式。
65 * CP15 Barriers
/linux/arch/riscv/include/asm/
H A Dbarrier.h17 /* These barriers need to enforce ordering on both devices or memory. */
22 /* These barriers do not need to enforce ordering on devices, just memory. */
/linux/tools/arch/arm64/include/asm/
H A Dbarrier.h7 * f428ebd184c82a7914b2aa7e9f868918aaf7ea78 perf tools: Fix AAAAARGH64 memory barriers
18 * Kernel uses dmb variants on arm64 for smp_*() barriers. Pretty much the same
/linux/tools/memory-model/
H A Dlinux-kernel.bell25 enum Barriers = 'wmb (*smp_wmb*) ||
37 instructions F[Barriers]
/linux/Documentation/translations/zh_CN/core-api/
H A Drefcount-vs-atomic.rst28 memory-barriers.txt和atomic_t.txt提供了更多关于内存顺序的背景,包括通用的
35 序类型。如果想了解更广泛的情况,请查阅memory-barriers.txt文件。
/linux/arch/sparc/lib/
H A Datomic_64.S16 * memory barriers, and a two which return
18 * barriers.
/linux/Documentation/process/
H A Dvolatile-considered-harmful.rst22 safe (spinlocks, mutexes, memory barriers, etc.) are designed to prevent
38 primitives act as memory barriers - they are explicitly written to do so -

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